summaryrefslogtreecommitdiff
path: root/drivers/clk/qcom/Makefile (follow)
Commit message (Collapse)AuthorAge
* clk: qcom: Add regmap mux-div clocks supportGeorgi Djakov2017-06-12
| | | | | | | | | | | | | | | Add support for hardware that can switch both parent clocks and divider at the same time. This avoids generating intermediate frequencies from either the old parent clock and new divider or new parent clock and old divider combinations. Change-Id: I1b3f7e9422f5c27eeb391d309374167dc139e8ca Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Git-commit: 549f1a4028350851f73837ad8cce3ac5fd2abd11 Git-repo: https://git.quicinc.com/?p=kernel/msm-4.4.git [anischal@codeaurora.org: Fix compilation issue with mux_div_get_safe_parent] Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* clk: qcom: Move clock debug measure support from common codeTaniya Das2017-03-17
| | | | | | | | | | The 'measure' functionality is a debug feature which allows the user of clocks to allow measuring the frequency of a given clock using the ring oscillator. Move 'measure' code to a new clk-debug file to support the functionality. Change-Id: I229721f17d232a4ff69b5cf416b43d22fee5b72e Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add qpnp clock divider supportTirupathi Reddy2017-01-31
| | | | | | | | | | Clkdiv module provides a clock output on the PMIC with CXO as the source. This clock can be routed through PMIC GPIOs. Add a device driver to configure this clkdiv module. CRs-Fixed: 1085200 Change-Id: I5e91a954bf5b6adbba8547b04361daf9788cca37 Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
* msm: Rename msmfalcon/apqfalcon to sdm660/sda660Neeraj Upadhyay2016-12-28
| | | | | | | | | Update the code name from msmfalcon/apqfalcon to sdm660/sda660. As part of this, update the filename containing "falcon" and files content containing "falcon". Change-Id: Iec85862251b9e1b4dcc8bdce8b214ce87c0049bc Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
* clk: qcom: Support CPU clock for OSM for common clock frameworkTaniya Das2016-12-22
| | | | | | | | | | | | Following list of changes have been made - Update the clock osm to register to common clock framework - Update clock ops as per common clock framework - cleanup unused function (clk_osm_setup_osm_was) - Fix tabs for macro definitions - Add clocks ids for power and perf clock for clients Change-Id: I389cc9e93a26a434be752cf74444d6c0985ff36d Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: add common clock framework support for MDSS PLLSandeep Panda2016-12-16
| | | | | | | | | Model and configure MDSS DSI PLL using upstream clock framework APIs. Add changes to define and register vco, divider, mux clcoks as per common clock infrastructure. Change-Id: Idc51070e2bb36d1a757d2714d2875a99901321a7 Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
* clk: qcom: Add support for MMCC clock for MSMFalconTaniya Das2016-11-21
| | | | | | | | | Add support for the multimedia clock controller found on MSMFalcon based devices. This should allow most clocks for multimedia peripherals which includes display, video, camera etc. Change-Id: If8aa0b094af5ff82fe66c95e3ef2f13632950d2e Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: clk-voter: Add support for voter clocksTaniya Das2016-10-14
| | | | | | | | | Voter clocks nodes would require aggregation of all child node rates. Certain clocks that are not rate-settable can still take advantage of voter clock functionality. Change-Id: Ibab7a5aa6aa89236974fcd0d65ffe0bd1a7acb12 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add support for GPU clocks for MSMFalconTaniya Das2016-10-07
| | | | | | | | | Add support for the graphics clock controller found on MSMFalcon based devices. This should allow graphics clocks for GFX clients to be able to do clock functionality. Change-Id: I753b40d574a4afc2104a5c2bfe64b4831fbce8a0 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* Merge "clk: qcom: Add support for GCC clock for MSMFalcon"Linux Build Service Account2016-09-30
|\
| * clk: qcom: Add support for GCC clock for MSMFalconTaniya Das2016-09-29
| | | | | | | | | | | | | | | | | | Add support for the global clock controller found on MSMFalcon based devices. This should allow most clocks for peripherals other than multimedia clocks. Change-Id: I1ec6309f32c658177580cc0601083d32bcdfad20 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | clk: qcom: Add support for regulator based GDSC controlTaniya Das2016-09-12
|/ | | | | | | | | | | | Support globally distributed switch controller(GDSC) as regulator. This will enable the clients to use the regulator framework to enable/disable the GDSCs. The hw_ctrl/domain_ctrl registers which might be required to be enabled before the GDSC are modelled using syscon framework. Change-Id: I2d63105d032ab16d5555722680f4371c831823cd Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: clk-dummy: Add a dummy clock providerTaniya Das2016-07-21
| | | | | | | | | Add a dummy clock provider that registers a simple callback that in turn always returns the dummy clock for any clk_get call. This is useful for unimplemented clocks. Change-Id: I08fcb174fd0e0c49f8069e106b48597bcdfe847d Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add Alpha PLL supportStephen Boyd2016-06-23
| | | | | | | | | | Add support for configuring rates of, enabling, and disabling Alpha PLLs. This is sufficient for the types of PLLs found in the global and multimedia clock controllers. Change-Id: I0d26e8f6d225cc3669f3a9e3c37b45e49e139879 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add support for RPM ClocksGeorgi Djakov2016-06-23
| | | | | | | | | | | | | | This adds initial support for clocks controlled by the Resource Power Manager (RPM) processor on some Qualcomm SoCs, which use the qcom_rpm driver to communicate with RPM. Such platforms are apq8064 and msm8960. Change-Id: I1a73355bc9117c34589a25cf58446cad13ceb6e3 (cherry picked from commit 06d998a24c68be94685af38e8becfda3c8bf757b) Git-commit: 06d998a24c68be94685af38e8becfda3c8bf757b Git-repo: https://git.linaro.org/landing-teams/working/qualcomm/kernel.git Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add support for SMD-RPM ClocksGeorgi Djakov2016-06-23
| | | | | | | | | | | | | | | | | | | | | | | This adds initial support for clocks controlled by the Resource Power Manager (RPM) processor on some Qualcomm SoCs, which use the qcom_smd_rpm driver to communicate with RPM. Such platforms are msm8916, apq8084 and msm8974. The RPM is a dedicated hardware engine for managing the shared SoC resources in order to keep the lowest power profile. It communicates with other hardware subsystems via shared memory and accepts clock requests, aggregates the requests and turns the clocks on/off or scales them on demand. This driver is based on the codeaurora.org driver: https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c Change-Id: I8d2882de9410a992a8045caedc7ab71e3c3e45b2 (cherry picked from commit 69edeaf51c07c24e06b433762b3ada7b3d786315) Git-commit: 69edeaf51c07c24e06b433762b3ada7b3d786315 Git-repo: https://git.linaro.org/landing-teams/working/qualcomm/kernel.git Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add A53 clock driverGeorgi Djakov2016-06-23
| | | | | | | | | | | | Add a driver for the A53 subsystem PLL, so that we can provide higher frequency clocks for use by the system. Change-Id: I69b4c363c8b656bcd9481b6310a972b8140311a9 (cherry picked from commit 60e4f862c16dfc995a71ec0f50524e020dbfde2f) Git-commit: 60e4f862c16dfc995a71ec0f50524e020dbfde2f Git-repo: https://git.linaro.org/landing-teams/working/qualcomm/kernel.git Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add Krait clock controller driverStephen Boyd2016-06-23
| | | | | | | | | | | | | The Krait CPU clocks are made up of a primary mux and secondary mux for each CPU and the L2, controlled via cp15 accessors. For Kraits within KPSSv1 each secondary mux accepts a different aux source, but on KPSSv2 each secondary mux accepts the same aux source. Change-Id: I871de8d291f5c1b848b215766c61b8bd0ed98f77 Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add KPSS ACC/GCC driverStephen Boyd2016-06-17
| | | | | | | | | | | | The ACC and GCC regions present in KPSSv1 contain registers to control clocks and power to each Krait CPU and L2. For CPUfreq purposes probe these devices and expose a mux clock that chooses between PXO and PLL8. Change-Id: Icaa1b68652eb4c836e8aacad80ff6cebe34cad4f Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add support for Krait clocksStephen Boyd2016-06-17
| | | | | | | | | | | | The Krait clocks are made up of a series of muxes and a divider that choose between a fixed rate clock and dedicated HFPLLs for each CPU. Instead of using mmio accesses to remux parents, the Krait implementation exposes the remux control via cp15 registers. Support these clocks. Change-Id: Ic720d45d8c78e6c5a901e58ec6fd23fa15302a21 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add support for High-Frequency PLLs (HFPLLs)Stephen Boyd2016-06-17
| | | | | | | | | HFPLLs are the main frequency source for Krait CPU clocks. Add support for changing the rate of these PLLs. Change-Id: I53cb4364e84d108f4fc211ca5524ca25d569997c Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add HFPLL driverStephen Boyd2016-06-17
| | | | | | | | | | | | On some devices (MSM8974 for example), the HFPLLs are instantiated within the Krait processor subsystem as separate register regions. Add a driver for these PLLs so that we can provide HFPLL clocks for use by the system. Change-Id: If8a3e492e1c227cbf42f4f9907cdcb0dcb3ccc11 Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driverStephen Boyd2016-06-17
| | | | | | | | | | Add a driver for the multimedia clock controller found on MSM8996 based devices. This should allow most multimedia device drivers to probe and control their clocks. Change-Id: I0b69b1e78a8b0faeaff3e5c87c73e24b1c19ba55 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
* clk: qcom: Add MSM8996 Global Clock Control (GCC) driverStephen Boyd2016-06-01
| | | | | | | | | | Add support for the global clock controller found on MSM8996 based devices. This should allow most non-multimedia device drivers to probe and control their clocks. Change-Id: I559f5976b56bf8933df2c68fc4e29b2bd0ce1160 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* clk: qcom: Add support for GDSCsStephen Boyd2015-09-16
| | | | | | | | | | | | GDSCs (Global Distributed Switch Controllers) are responsible for safely collapsing and restoring power to peripherals in the SoC. These are best modelled as power domains using genpd and given the registers are scattered throughout the clock controller register space, its best to have the support added through the clock driver. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: Add MSM8916 Global Clock Controller supportGeorgi Djakov2015-03-23
| | | | | | | | | | This patch adds support for the global clock controller found on the MSM8916 based devices. It allows the various device drivers to probe and control their clocks and resets. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> [sboyd@codeaurora.org: Removed NULL entry from parent_maps] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: Add MSM8960/APQ8064 LPASS clock controller (LCC) driverStephen Boyd2015-01-27
| | | | | | | | | Add an LCC driver for MSM8960/APQ8064 that supports the i2s, slimbus, and pcm clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Kenneth Westfield <kwestfie@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* clk: qcom: Add IPQ806X LPASS clock controller (LCC) driverRajendra Nayak2015-01-27
| | | | | | | | | | | | | | | | Add an LCC driver for IPQ806x that supports the i2s, S/PDIF, and pcm clocks. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> [sboyd@codeaurora.org: Reworded commit text, added Kconfig select, fleshed out Kconfig description a bit more, added pll4 configuration and reworked probe for it, added muxes, split out dt-binding file] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Kenneth Westfield <kwestfie@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* clk: qcom: Add simple regmap based muxesStephen Boyd2015-01-27
| | | | | | | | | | | Add support for muxes that use regmap instead of readl/writel directly. We don't support as many features as clk-mux.c, but this is good enough to support getting and setting parents. Adding a table based lookup can be added in the future if needed. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Kenneth Westfield <kwestfie@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* clk: qcom: Add support for regmap divider clocksJosh Cartwright2015-01-27
| | | | | | | | | | | | Add support for dividers that use regmap instead of readl/writel. Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> [sboyd@codeaurora.org: Switch to using generic divider code, drop enable/disable, reword commit text] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Kenneth Westfield <kwestfie@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* clk: qcom: Add support for IPQ8064's global clock controller (GCC)Kumar Gala2014-07-15
| | | | | | | | | | | | Add a driver for the global clock controller found on IPQ8064 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. This is currently missing clocks for USB HSIC and networking devices. Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) supportGeorgi Djakov2014-07-15
| | | | | | | | | | Add support for the multimedia clock controller found on the APQ8084 based platforms. This will allow the multimedia device drivers to control their clocks. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> [sboyd: Rework parent mapping to avoid conflicts] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: Add APQ8084 Global Clock Controller supportGeorgi Djakov2014-07-11
| | | | | | | | This patch adds support for the global clock controller found on the APQ8084 based devices. This includes UART, I2C, SPI etc. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: Consolidate common probe codeStephen Boyd2014-04-30
| | | | | | | | | | Most of the probe code is the same between all the different clock controllers. Consolidate the code into a common.c file. This makes changes to the common probe parts easier and reduces chances for bugs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Fix modular buildStephen Boyd2014-01-17
| | | | | | | | | | According to Documentation/kbuild/makefiles.txt these symbols should be clk-qcom-y. Otherwise the build will fail if CONFIG_COMMON_CLK_QCOM=m. Fix it. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add support for MSM8660's global clock controller (GCC)Stephen Boyd2014-01-16
| | | | | | | | | Add a driver for the global clock controller found on MSM8660 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)Stephen Boyd2014-01-16
| | | | | | | | | Add a driver for the global clock controller found on MSM 8974 based platforms. This should allow most multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add support for MSM8974's global clock controller (GCC)Stephen Boyd2014-01-16
| | | | | | | | | Add a driver for the global clock controller found on MSM 8974 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)Stephen Boyd2014-01-16
| | | | | | | | | Add a driver for the multimedia clock controller found on MSM 8960 based platforms. This should allow multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add support for MSM8960's global clock controller (GCC)Stephen Boyd2014-01-16
| | | | | | | | | Add a driver for the global clock controller found on MSM8960 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add reset controller supportStephen Boyd2014-01-16
| | | | | | | | | | | | Reset controllers and clock controllers are combined into one IP block on Qualcomm chipsets. Usually a reset signal is associated with each clock branch but sometimes a reset signal is associated with a handful of clocks. Either way the register interface is the same; set a bit to assert a reset and clear a bit to deassert a reset. Add support for these types of resets signals. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add support for branches/gate clocksStephen Boyd2014-01-16
| | | | | Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add support for root clock generators (RCGs)Stephen Boyd2014-01-16
| | | | | | | | | | Add support for the root clock generators on Qualcomm devices. RCGs are highly customizable mux/divider/counter clocks that can be used to generate almost any rate desired given some input source that is faster than the desired rate. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add support for phase locked loops (PLLs)Stephen Boyd2014-01-16
| | | | | | | | | | Add support for Qualcomm's PLLs (phase locked loops). This is sufficient enough to be able to determine the rate the PLL is running at. We can add rate setting support later when it's needed. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: qcom: Add a regmap type clock structStephen Boyd2014-01-16
Add a clock type that associates a regmap pointer and some enable/disable bits with a clk_hw struct. This will be the struct that a hw specific implementation wraps if it wants to use the regmap helper functions. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-03-03 02:12:46 +0000