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To support reset function in virtual clock driver, we register
a reset controller in virtual clock front driver. It is a virtual
reset controller which talks with host backend via virtual clock
message.
Change-Id: I13d48180534110260d66e42f3a02b63c2afcaeca
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
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It is virtual clock frontend driver which communicates
with host backend clock service/driver over HABMM. It
only supports msm8996 virtual platform currently.
Change-Id: Icfee28c301fa4a583b45e5d364432535643eb9b7
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
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Update the code name from msmcobalt to msm8998. As a result, update
the filename containing "cobalt" and files content containing "cobalt".
CRs-Fixed: 1070840
Change-Id: I2c7b95e3e2a2fec7730724da9eeb86a39a77faf1
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
Signed-off-by: Kyle Yan <kyan@codeaurora.org>
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
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A reset signal is associated with each clock branch but sometimes a reset
signal is associated with a handful of clocks. Either way the register
interface is the same; set a bit to assert a reset and clear a bit to
deassert a reset. Add support for these types of resets signals.
Change-Id: Ic9d00c0a03507a55ca6c96f977a6ddf55b4b5db7
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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Currently on msm-4.4 kernel, MSM8996 clock files are built when
ARCH_QCOM is enabled. Compile 8996 clock files only when
ARCH_MSM8996 is enabled, to avoid any issue when compiling for
other targets.
Change-Id: I58440ae6cf7f02b7137312c38219efeaccf06b58
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
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The MDSS clock drivers were not getting compiled due to an extra 'y', fix
the same.
CRs-Fixed: 1041122
Change-Id: I21e62361f40eb654c369048d01e158d4b96dd551
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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Support MSM clock controller config to allow MSM devices to use the clock
controller.
Change-Id: Iae2cf922e8a69979ea353bf7353304f9be7405ce
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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The Operating State Manager is a hardware block which deals with
performing voltage and frequency change operations in the CPUSS. Two
instances exist, one for each cluster, in the msmcobalt chip.
Introduce the OSM clock driver to perform the required OSM hardware
block initialization and support DCVS scale requests.
Change-Id: I3e155db5cd580e371ca1791815e4942f442a3d20
CRs-Fixed: 967319
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
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Add support to model the multimedia clocks on MSMCOBALT.
Change-Id: Iec33fa93e745a65205cf4206759289d7e842fe36
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
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Add support to model the graphics clocks on MSMCOBALT.
Change-Id: I31c3dda59a0bb7e9b6b6cee8176fb46f46767629
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
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Each display output interface such as eDP, HDMI and
DSI are clocked by different pll clocks to support
various displays at different resolution simultaneously.
The mdss pll driver handles all these display output
interfaces' pll clocks separately. It also handles their
resources through dtsi configuration.
Change-Id: I1de2ae9a0549de901a6c82ea489199a722344dc4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Add clock tree support for MSM8996 and MSMCOBALT, and add corresponding dt
bindings header files.
Change-Id: If0281f96ce5dd29b04f190efa1527888bc240bb5
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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Support added for MSM clock and modifications in the clk framework to use
the MSM clock framework.
Change-Id: Ibbcf0ffbf9d30dde2dcb0e943225ad95dd4e857d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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