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| author | Rajesh Bondugula <rajeshb@codeaurora.org> | 2017-01-12 17:22:14 -0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-01-30 11:25:28 -0800 |
| commit | 9064d219488e48bef62febcaf5f2cfebf74ad63d (patch) | |
| tree | 351acf18645557d456f8600d043da24c9c64634b /tools/perf/scripts/python/syscall-counts.py | |
| parent | 24377df2b44eb5d8b11571be6fb18fbc9c24b600 (diff) | |
ARM: dts: msm: Update csi source clk in msm8998
Set phy/csid clk to 274290000 MAX clk in SVS mode in MSM8998.
This is needed to handle higher data rate from sensor and to
achieve dynamic clock scaling based on data rate.
Crs-Fixed: 1111089
Change-Id: If148f5a53ce4b151e4e7a2afe0352e5dba4a85ad
Signed-off-by: Rajesh Bondugula <rajeshb@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions