diff options
| author | Devesh Jhunjhunwala <deveshj@codeaurora.org> | 2016-03-18 12:40:31 -0700 |
|---|---|---|
| committer | Jeevan Shriram <jshriram@codeaurora.org> | 2016-04-04 19:30:09 -0700 |
| commit | ae8eef27c36e4f781982da17fd2feabd8156e941 (patch) | |
| tree | 3f6b5966997a0c039696e6569fe8f7126506f80d /include | |
| parent | 180d11a95e0763d224c3aeb43b245c1561ab1df4 (diff) | |
clk: msm: alpha-pll: Add support for dynamic programming of PLLs
Update the alpha_pll_set_rate function to support dynamically
updating the pll frequency if the dynamic_update flag is defined
for the pll. Also set the HW_UPDATE_BYPASS_LOGIC bit for these
plls during handoff.
CRs-Fixed: 988270
Change-Id: I7f3527ef45cf68c3f5c41e04bfdd3ede55bbaa4d
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/soc/qcom/clock-alpha-pll.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/soc/qcom/clock-alpha-pll.h b/include/soc/qcom/clock-alpha-pll.h index b5a34b4cecb5..0b5329ba817c 100644 --- a/include/soc/qcom/clock-alpha-pll.h +++ b/include/soc/qcom/clock-alpha-pll.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -66,6 +66,12 @@ struct alpha_pll_clk { bool slew; bool no_prepared_reconfig; + /* some PLLs support dynamically updating their rate + * without disabling the PLL first. Set this flag + * to enable this support. + */ + bool dynamic_update; + /* * Some chipsets need the offline request bit to be * cleared on a second write to the register, even though |