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| author | Baptiste Reynal <b.reynal@virtualopensystems.com> | 2015-03-04 16:51:06 +0100 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-22 11:14:49 -0700 |
| commit | 1805fabc3e76b80e2dcc73f78e70ee9b61406e9b (patch) | |
| tree | 41a2588ee6f3841d206a936d74f7c0218de08a90 /include/linux | |
| parent | aaf63985193d717bba56d601a9521dbc412e0b50 (diff) | |
iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition
This patch is a fix to "iommu/arm-smmu: add support for iova_to_phys
through ATS1PR".
According to ARM documentation, translation registers are optional even
in SMMUv1, so ID0_S1TS needs to be checked to verify their presence.
Also, we check that the domain is a stage-1 domain.
Change-Id: I2164ddb3806f941d21463731d0991ce1a83a5221
Signed-off-by: Baptiste Reynal <b.reynal@virtualopensystems.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions