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authorNeeraj Upadhyay <neeraju@codeaurora.org>2016-12-27 19:03:35 +0530
committerNeeraj Upadhyay <neeraju@codeaurora.org>2016-12-28 21:56:21 +0530
commitda23c02138f79eacef6f8adfbf75db2a4a14f3ad (patch)
treeb3d345a93a4b88ca5898c5cad0684d1b674f03f3 /drivers/phy
parentaa36bb38fc87f49921c9e07fdb4a1a74482f26af (diff)
msm: Rename msmfalcon/apqfalcon to sdm660/sda660
Update the code name from msmfalcon/apqfalcon to sdm660/sda660. As part of this, update the filename containing "falcon" and files content containing "falcon". Change-Id: Iec85862251b9e1b4dcc8bdce8b214ce87c0049bc Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/Makefile2
-rw-r--r--drivers/phy/phy-qcom-ufs-qmp-v3-660.c (renamed from drivers/phy/phy-qcom-ufs-qmp-v3-falcon.c)72
-rw-r--r--drivers/phy/phy-qcom-ufs-qmp-v3-660.h (renamed from drivers/phy/phy-qcom-ufs-qmp-v3-falcon.h)8
3 files changed, 41 insertions, 41 deletions
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 223339ff119d..e1ef353aa1e1 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -46,7 +46,7 @@ obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-v3.o
obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qrbtc-v2.o
-obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-v3-falcon.o
+obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-v3-660.o
obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
obj-$(CONFIG_PHY_BRCMSTB_SATA) += phy-brcmstb-sata.o
obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
diff --git a/drivers/phy/phy-qcom-ufs-qmp-v3-falcon.c b/drivers/phy/phy-qcom-ufs-qmp-v3-660.c
index e88c00e01e0b..a0cb7d0896d1 100644
--- a/drivers/phy/phy-qcom-ufs-qmp-v3-falcon.c
+++ b/drivers/phy/phy-qcom-ufs-qmp-v3-660.c
@@ -12,12 +12,12 @@
*
*/
-#include "phy-qcom-ufs-qmp-v3-falcon.h"
+#include "phy-qcom-ufs-qmp-v3-660.h"
-#define UFS_PHY_NAME "ufs_phy_qmp_v3_falcon"
+#define UFS_PHY_NAME "ufs_phy_qmp_v3_660"
static
-int ufs_qcom_phy_qmp_v3_falcon_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
+int ufs_qcom_phy_qmp_v3_660_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
bool is_rate_B)
{
int err;
@@ -55,9 +55,9 @@ out:
return err;
}
-static int ufs_qcom_phy_qmp_v3_falcon_init(struct phy *generic_phy)
+static int ufs_qcom_phy_qmp_v3_660_init(struct phy *generic_phy)
{
- struct ufs_qcom_phy_qmp_v3_falcon *phy = phy_get_drvdata(generic_phy);
+ struct ufs_qcom_phy_qmp_v3_660 *phy = phy_get_drvdata(generic_phy);
struct ufs_qcom_phy *phy_common = &phy->common_cfg;
int err;
@@ -80,7 +80,7 @@ out:
}
static
-void ufs_qcom_phy_qmp_v3_falcon_power_control(struct ufs_qcom_phy *phy,
+void ufs_qcom_phy_qmp_v3_660_power_control(struct ufs_qcom_phy *phy,
bool power_ctrl)
{
if (!power_ctrl) {
@@ -104,7 +104,7 @@ void ufs_qcom_phy_qmp_v3_falcon_power_control(struct ufs_qcom_phy *phy,
}
static inline
-void ufs_qcom_phy_qmp_v3_falcon_set_tx_lane_enable(struct ufs_qcom_phy *phy,
+void ufs_qcom_phy_qmp_v3_660_set_tx_lane_enable(struct ufs_qcom_phy *phy,
u32 val)
{
/*
@@ -114,7 +114,7 @@ void ufs_qcom_phy_qmp_v3_falcon_set_tx_lane_enable(struct ufs_qcom_phy *phy,
}
static
-void ufs_qcom_phy_qmp_v3_falcon_ctrl_rx_linecfg(struct ufs_qcom_phy *phy,
+void ufs_qcom_phy_qmp_v3_660_ctrl_rx_linecfg(struct ufs_qcom_phy *phy,
bool ctrl)
{
u32 temp;
@@ -131,7 +131,7 @@ void ufs_qcom_phy_qmp_v3_falcon_ctrl_rx_linecfg(struct ufs_qcom_phy *phy,
mb();
}
-static inline void ufs_qcom_phy_qmp_v3_falcon_start_serdes(
+static inline void ufs_qcom_phy_qmp_v3_660_start_serdes(
struct ufs_qcom_phy *phy)
{
u32 tmp;
@@ -144,7 +144,7 @@ static inline void ufs_qcom_phy_qmp_v3_falcon_start_serdes(
mb();
}
-static int ufs_qcom_phy_qmp_v3_falcon_is_pcs_ready(
+static int ufs_qcom_phy_qmp_v3_660_is_pcs_ready(
struct ufs_qcom_phy *phy_common)
{
int err = 0;
@@ -158,7 +158,7 @@ static int ufs_qcom_phy_qmp_v3_falcon_is_pcs_ready(
return err;
}
-static void ufs_qcom_phy_qmp_v3_falcon_dbg_register_dump(
+static void ufs_qcom_phy_qmp_v3_660_dbg_register_dump(
struct ufs_qcom_phy *phy)
{
ufs_qcom_phy_dump_regs(phy, COM_BASE, COM_SIZE,
@@ -171,30 +171,30 @@ static void ufs_qcom_phy_qmp_v3_falcon_dbg_register_dump(
"PHY TX0 Registers ");
}
-struct phy_ops ufs_qcom_phy_qmp_v3_falcon_phy_ops = {
- .init = ufs_qcom_phy_qmp_v3_falcon_init,
+struct phy_ops ufs_qcom_phy_qmp_v3_660_phy_ops = {
+ .init = ufs_qcom_phy_qmp_v3_660_init,
.exit = ufs_qcom_phy_exit,
.power_on = ufs_qcom_phy_power_on,
.power_off = ufs_qcom_phy_power_off,
.owner = THIS_MODULE,
};
-struct ufs_qcom_phy_specific_ops phy_v3_falcon_ops = {
- .calibrate_phy = ufs_qcom_phy_qmp_v3_falcon_phy_calibrate,
- .start_serdes = ufs_qcom_phy_qmp_v3_falcon_start_serdes,
+struct ufs_qcom_phy_specific_ops phy_v3_660_ops = {
+ .calibrate_phy = ufs_qcom_phy_qmp_v3_660_phy_calibrate,
+ .start_serdes = ufs_qcom_phy_qmp_v3_660_start_serdes,
.is_physical_coding_sublayer_ready =
- ufs_qcom_phy_qmp_v3_falcon_is_pcs_ready,
- .set_tx_lane_enable = ufs_qcom_phy_qmp_v3_falcon_set_tx_lane_enable,
- .ctrl_rx_linecfg = ufs_qcom_phy_qmp_v3_falcon_ctrl_rx_linecfg,
- .power_control = ufs_qcom_phy_qmp_v3_falcon_power_control,
- .dbg_register_dump = ufs_qcom_phy_qmp_v3_falcon_dbg_register_dump,
+ ufs_qcom_phy_qmp_v3_660_is_pcs_ready,
+ .set_tx_lane_enable = ufs_qcom_phy_qmp_v3_660_set_tx_lane_enable,
+ .ctrl_rx_linecfg = ufs_qcom_phy_qmp_v3_660_ctrl_rx_linecfg,
+ .power_control = ufs_qcom_phy_qmp_v3_660_power_control,
+ .dbg_register_dump = ufs_qcom_phy_qmp_v3_660_dbg_register_dump,
};
-static int ufs_qcom_phy_qmp_v3_falcon_probe(struct platform_device *pdev)
+static int ufs_qcom_phy_qmp_v3_660_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct phy *generic_phy;
- struct ufs_qcom_phy_qmp_v3_falcon *phy;
+ struct ufs_qcom_phy_qmp_v3_660 *phy;
int err = 0;
phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
@@ -204,8 +204,8 @@ static int ufs_qcom_phy_qmp_v3_falcon_probe(struct platform_device *pdev)
}
generic_phy = ufs_qcom_phy_generic_probe(pdev, &phy->common_cfg,
- &ufs_qcom_phy_qmp_v3_falcon_phy_ops,
- &phy_v3_falcon_ops);
+ &ufs_qcom_phy_qmp_v3_660_phy_ops,
+ &phy_v3_660_ops);
if (!generic_phy) {
dev_err(dev, "%s: ufs_qcom_phy_generic_probe() failed\n",
@@ -223,7 +223,7 @@ out:
return err;
}
-static int ufs_qcom_phy_qmp_v3_falcon_remove(struct platform_device *pdev)
+static int ufs_qcom_phy_qmp_v3_660_remove(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct phy *generic_phy = to_phy(dev);
@@ -238,23 +238,23 @@ static int ufs_qcom_phy_qmp_v3_falcon_remove(struct platform_device *pdev)
return err;
}
-static const struct of_device_id ufs_qcom_phy_qmp_v3_falcon_of_match[] = {
- {.compatible = "qcom,ufs-phy-qmp-v3-falcon"},
+static const struct of_device_id ufs_qcom_phy_qmp_v3_660_of_match[] = {
+ {.compatible = "qcom,ufs-phy-qmp-v3-660"},
{},
};
-MODULE_DEVICE_TABLE(of, ufs_qcom_phy_qmp_v3_falcon_of_match);
+MODULE_DEVICE_TABLE(of, ufs_qcom_phy_qmp_v3_660_of_match);
-static struct platform_driver ufs_qcom_phy_qmp_v3_falcon_driver = {
- .probe = ufs_qcom_phy_qmp_v3_falcon_probe,
- .remove = ufs_qcom_phy_qmp_v3_falcon_remove,
+static struct platform_driver ufs_qcom_phy_qmp_v3_660_driver = {
+ .probe = ufs_qcom_phy_qmp_v3_660_probe,
+ .remove = ufs_qcom_phy_qmp_v3_660_remove,
.driver = {
- .of_match_table = ufs_qcom_phy_qmp_v3_falcon_of_match,
- .name = "ufs_qcom_phy_qmp_v3_falcon",
+ .of_match_table = ufs_qcom_phy_qmp_v3_660_of_match,
+ .name = "ufs_qcom_phy_qmp_v3_660",
.owner = THIS_MODULE,
},
};
-module_platform_driver(ufs_qcom_phy_qmp_v3_falcon_driver);
+module_platform_driver(ufs_qcom_phy_qmp_v3_660_driver);
-MODULE_DESCRIPTION("Universal Flash Storage (UFS) QCOM PHY QMP v3 falcon");
+MODULE_DESCRIPTION("Universal Flash Storage (UFS) QCOM PHY QMP v3 660");
MODULE_LICENSE("GPL v2");
diff --git a/drivers/phy/phy-qcom-ufs-qmp-v3-falcon.h b/drivers/phy/phy-qcom-ufs-qmp-v3-660.h
index e64601cc6b22..8d0183d87e20 100644
--- a/drivers/phy/phy-qcom-ufs-qmp-v3-falcon.h
+++ b/drivers/phy/phy-qcom-ufs-qmp-v3-660.h
@@ -12,8 +12,8 @@
*
*/
-#ifndef UFS_QCOM_PHY_QMP_V3_FALCON_H_
-#define UFS_QCOM_PHY_QMP_V3_FALCON_H_
+#ifndef UFS_QCOM_PHY_QMP_V3_660_H_
+#define UFS_QCOM_PHY_QMP_V3_660_H_
#include "phy-qcom-ufs-i.h"
@@ -185,14 +185,14 @@
#define UFS_PHY_RX_LINECFG_DISABLE_BIT BIT(1)
/*
- * This structure represents the v3 falcon specific phy.
+ * This structure represents the v3 660 specific phy.
* common_cfg MUST remain the first field in this structure
* in case extra fields are added. This way, when calling
* get_ufs_qcom_phy() of generic phy, we can extract the
* common phy structure (struct ufs_qcom_phy) out of it
* regardless of the relevant specific phy.
*/
-struct ufs_qcom_phy_qmp_v3_falcon {
+struct ufs_qcom_phy_qmp_v3_660 {
struct ufs_qcom_phy common_cfg;
};