diff options
| author | Padmanabhan Komanduru <pkomandu@codeaurora.org> | 2017-02-05 10:30:31 +0530 |
|---|---|---|
| committer | Padmanabhan Komanduru <pkomandu@codeaurora.org> | 2017-02-05 11:09:07 +0530 |
| commit | d9433524bf4d5cebafcd4e82dc67680dd3695272 (patch) | |
| tree | 8c4aa2e8657f9b572e5d40a12175413f765b5712 /Documentation/devicetree | |
| parent | 5c575fbbbdcef4b782da14e0a9a0f8967eec75e9 (diff) | |
msm: mdss: dp: add support to parse maximum PCLK from dtsi for display port
For SDM660 and MSM8998 even though the DP controller version is
the same, there is a difference in the maximum pixel clock
frequency supported between these targets. Add support to parse
this property from the MDSS Display Port dtsi node as an optional
property.
Change-Id: I568ac44e41c7bf34f4b87b3199cdecad54e166c3
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Diffstat (limited to 'Documentation/devicetree')
| -rw-r--r-- | Documentation/devicetree/bindings/fb/mdss-dp.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/fb/mdss-dp.txt b/Documentation/devicetree/bindings/fb/mdss-dp.txt index 7bf7b9bacb60..aa227c2628da 100644 --- a/Documentation/devicetree/bindings/fb/mdss-dp.txt +++ b/Documentation/devicetree/bindings/fb/mdss-dp.txt @@ -54,6 +54,7 @@ Optional properties: device node. Refer to pinctrl-bindings.txt - qcom,logical2physical-lane-map: An array that specifies the DP logical to physical lane map setting. - qcom,phy-register-offset: An integer specifying the offset value of DP PHY register space. +- qcom,max-pclk-frequency-khz: An integer specifying the max. pixel clock in KHz supported by Display Port. Example: mdss_dp_ctrl: qcom,dp_ctrl@c990000 { @@ -89,6 +90,7 @@ Example: qcom,aux-cfg-settings = [00 13 00 10 0a 26 0a 03 8b 03]; qcom,logical2physical-lane-map = [02 03 01 00]; qcom,phy-register-offset = <0x4>; + qcom,max-pclk-frequency-khz = <593470>; qcom,core-supply-entries { #address-cells = <1>; |