diff options
| author | Padmanabhan Komanduru <pkomandu@codeaurora.org> | 2017-02-05 10:30:31 +0530 |
|---|---|---|
| committer | Padmanabhan Komanduru <pkomandu@codeaurora.org> | 2017-02-05 11:09:07 +0530 |
| commit | d9433524bf4d5cebafcd4e82dc67680dd3695272 (patch) | |
| tree | 8c4aa2e8657f9b572e5d40a12175413f765b5712 | |
| parent | 5c575fbbbdcef4b782da14e0a9a0f8967eec75e9 (diff) | |
msm: mdss: dp: add support to parse maximum PCLK from dtsi for display port
For SDM660 and MSM8998 even though the DP controller version is
the same, there is a difference in the maximum pixel clock
frequency supported between these targets. Add support to parse
this property from the MDSS Display Port dtsi node as an optional
property.
Change-Id: I568ac44e41c7bf34f4b87b3199cdecad54e166c3
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
| -rw-r--r-- | Documentation/devicetree/bindings/fb/mdss-dp.txt | 2 | ||||
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_dp.c | 8 |
2 files changed, 8 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/fb/mdss-dp.txt b/Documentation/devicetree/bindings/fb/mdss-dp.txt index 7bf7b9bacb60..aa227c2628da 100644 --- a/Documentation/devicetree/bindings/fb/mdss-dp.txt +++ b/Documentation/devicetree/bindings/fb/mdss-dp.txt @@ -54,6 +54,7 @@ Optional properties: device node. Refer to pinctrl-bindings.txt - qcom,logical2physical-lane-map: An array that specifies the DP logical to physical lane map setting. - qcom,phy-register-offset: An integer specifying the offset value of DP PHY register space. +- qcom,max-pclk-frequency-khz: An integer specifying the max. pixel clock in KHz supported by Display Port. Example: mdss_dp_ctrl: qcom,dp_ctrl@c990000 { @@ -89,6 +90,7 @@ Example: qcom,aux-cfg-settings = [00 13 00 10 0a 26 0a 03 8b 03]; qcom,logical2physical-lane-map = [02 03 01 00]; qcom,phy-register-offset = <0x4>; + qcom,max-pclk-frequency-khz = <593470>; qcom,core-supply-entries { #address-cells = <1>; diff --git a/drivers/video/fbdev/msm/mdss_dp.c b/drivers/video/fbdev/msm/mdss_dp.c index 2199f923260f..a8336eda0857 100644 --- a/drivers/video/fbdev/msm/mdss_dp.c +++ b/drivers/video/fbdev/msm/mdss_dp.c @@ -132,7 +132,7 @@ static int mdss_dp_is_clk_prefix(const char *clk_prefix, const char *clk_name) static int mdss_dp_parse_prop(struct platform_device *pdev, struct mdss_dp_drv_pdata *dp_drv) { - int len = 0, i = 0; + int len = 0, i = 0, rc = 0; const char *data; data = of_get_property(pdev->dev.of_node, @@ -160,6 +160,11 @@ static int mdss_dp_parse_prop(struct platform_device *pdev, dp_drv->l_map[i] = data[i]; } + rc = of_property_read_u32(pdev->dev.of_node, + "qcom,max-pclk-frequency-khz", &dp_drv->max_pclk_khz); + if (rc) + dp_drv->max_pclk_khz = DP_MAX_PIXEL_CLK_KHZ; + return 0; } @@ -1683,7 +1688,6 @@ static int mdss_dp_edid_init(struct mdss_panel_data *pdata) dp_drv = container_of(pdata, struct mdss_dp_drv_pdata, panel_data); - dp_drv->max_pclk_khz = DP_MAX_PIXEL_CLK_KHZ; edid_init_data.kobj = dp_drv->kobj; edid_init_data.max_pclk_khz = dp_drv->max_pclk_khz; |