diff options
| author | Linux Build Service Account <lnxbuild@localhost> | 2017-02-16 03:05:23 -0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-02-16 03:05:22 -0800 |
| commit | f44d9e364a517b521ea9081af73e85e78289c0dd (patch) | |
| tree | 5fe59252d4730e13a44c8a999fbca6409d5e3697 | |
| parent | 2081c63810a07533701fa0a272ca59f90bb59bac (diff) | |
| parent | 4e258da2a2fd30c65937b04685439f6cb994da71 (diff) | |
Merge "ARM: dts: msm: update CPU efficiency values for sdm660"
| -rw-r--r-- | arch/arm/boot/dts/qcom/sdm660.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/qcom/sdm660.dtsi b/arch/arm/boot/dts/qcom/sdm660.dtsi index 8633d89821ec..e9f6e4b1b727 100644 --- a/arch/arm/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660.dtsi @@ -152,7 +152,7 @@ qcom,limits-info = <&mitigation_profile1>; qcom,lmh-dcvs = <&lmh_dcvs1>; qcom,ea = <&ea4>; - efficiency = <1536>; + efficiency = <1638>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "arm,arch-cache"; @@ -179,7 +179,7 @@ qcom,limits-info = <&mitigation_profile2>; qcom,lmh-dcvs = <&lmh_dcvs1>; qcom,ea = <&ea5>; - efficiency = <1536>; + efficiency = <1638>; next-level-cache = <&L2_1>; L1_I_101: l1-icache { compatible = "arm,arch-cache"; @@ -202,7 +202,7 @@ qcom,limits-info = <&mitigation_profile3>; qcom,lmh-dcvs = <&lmh_dcvs1>; qcom,ea = <&ea6>; - efficiency = <1536>; + efficiency = <1638>; next-level-cache = <&L2_1>; L1_I_102: l1-icache { compatible = "arm,arch-cache"; @@ -225,7 +225,7 @@ qcom,limits-info = <&mitigation_profile4>; qcom,lmh-dcvs = <&lmh_dcvs1>; qcom,ea = <&ea7>; - efficiency = <1536>; + efficiency = <1638>; next-level-cache = <&L2_1>; L1_I_103: l1-icache { compatible = "arm,arch-cache"; |