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| author | Linux Build Service Account <lnxbuild@quicinc.com> | 2017-12-08 02:17:00 -0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-12-08 02:17:00 -0800 |
| commit | 4d55e872182532a2d3fd3ee9b954e3c8b9532c22 (patch) | |
| tree | 3b1790976552e623dd70b9aefe4a7efe32a3eeae | |
| parent | 4611ba9cdab555622a6ee8a37747cba443b2da25 (diff) | |
| parent | b455f181be3c434baf3485bf709b1c728f0ffca1 (diff) | |
Merge "ARM: dts: msm: Disable PCIe L1 and L1ss for msm8996 CV2X"
| -rw-r--r-- | arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi b/arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi index e96ed3020679..9d7116a9f076 100644 --- a/arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi @@ -335,9 +335,16 @@ /delete-property/ vin-supply; }; +&pcie0 { + /delete-property/ qcom,l1-supported; + /delete-property/ qcom,l1ss-supported; +}; + &pcie1 { qcom,msi-gicm-addr = <0x09bd0040>; qcom,msi-gicm-base = <0x240>; + /delete-property/ qcom,l1-supported; + /delete-property/ qcom,l1ss-supported; }; &pcie2 { |