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authorGustavo Solaira <gustavos@codeaurora.org>2017-12-05 11:44:02 -0800
committerGustavo Solaira <gustavos@codeaurora.org>2017-12-05 21:36:16 -0800
commitb455f181be3c434baf3485bf709b1c728f0ffca1 (patch)
treedb68a79b46a2e87507ee3b6ff3d9a4733c6d21e8
parent55cbbe687356eeb53256e8f8dc7f7daddae68272 (diff)
ARM: dts: msm: Disable PCIe L1 and L1ss for msm8996 CV2X
Disable L1 and L1ss PCIe low power modes for msm8996 CV2X since it causes problems with WLAN (RC0) and not supported by Neutrino Ethernet (RC1). Change-Id: I7d9358a2cb5921f5e5d5da858faec553197063ee Signed-off-by: Gustavo Solaira <gustavos@codeaurora.org>
-rw-r--r--arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi b/arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi
index e96ed3020679..9d7116a9f076 100644
--- a/arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi
+++ b/arch/arm/boot/dts/qcom/msm8996-cv2x.dtsi
@@ -335,9 +335,16 @@
/delete-property/ vin-supply;
};
+&pcie0 {
+ /delete-property/ qcom,l1-supported;
+ /delete-property/ qcom,l1ss-supported;
+};
+
&pcie1 {
qcom,msi-gicm-addr = <0x09bd0040>;
qcom,msi-gicm-base = <0x240>;
+ /delete-property/ qcom,l1-supported;
+ /delete-property/ qcom,l1ss-supported;
};
&pcie2 {