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authorShashank Mittal <mittals@codeaurora.org>2016-06-06 13:57:19 -0700
committerKyle Yan <kyan@codeaurora.org>2016-06-23 14:00:41 -0700
commit338876f6fbb719becc72022da7eccda9273833b9 (patch)
treee5ed625575a9c9bccc3e1a0ddfc997b1f4e8a096
parentac49540967880d389fa20db1a043096e29678fec (diff)
ARM: dts: msm: enable flush on reset for TMC devices on msmcobalt
Add CTI nodes to configure TMC flush on reset for TMC devices. Change-Id: I0505326b91558ce052d136cfb456ca0841a26f28 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi
index aaafe42ce2a1..c0777a7e193a 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi
@@ -21,6 +21,8 @@
arm,buffer-size = <0x400000>;
+ coresight-ctis = <&cti0 &cti8>;
+
coresight-name = "coresight-tmc-etr";
clocks = <&clock_gcc clk_qdss_clk>,
@@ -69,6 +71,8 @@
reg = <0x6047000 0x1000>;
reg-names = "tmc-base";
+ coresight-ctis = <&cti0 &cti8>;
+
coresight-name = "coresight-tmc-etf";
clocks = <&clock_gcc clk_qdss_clk>,