diff options
Diffstat (limited to 'circuitpython/mpy-cross/build/genhdr/qstr/@@__py__emitinlinextensa.c.qstr')
-rw-r--r-- | circuitpython/mpy-cross/build/genhdr/qstr/@@__py__emitinlinextensa.c.qstr | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/circuitpython/mpy-cross/build/genhdr/qstr/@@__py__emitinlinextensa.c.qstr b/circuitpython/mpy-cross/build/genhdr/qstr/@@__py__emitinlinextensa.c.qstr new file mode 100644 index 0000000..f3bae92 --- /dev/null +++ b/circuitpython/mpy-cross/build/genhdr/qstr/@@__py__emitinlinextensa.c.qstr @@ -0,0 +1,43 @@ +Q(and_) +Q(or_) +Q(xor) +Q(add) +Q(sub) +Q(mull) +Q(l8ui) +Q(l16ui) +Q(l32i) +Q(s8i) +Q(s16i) +Q(s32i) +Q(l16si) +Q(addi) +Q(ball) +Q(bany) +Q(bbc) +Q(bbs) +Q(beq) +Q(bge) +Q(bgeu) +Q(blt) +Q(bnall) +Q(bne) +Q(bnone) +Q(ret_n) +Q(callx0) +Q(j) +Q(jx) +Q(beqz) +Q(bnez) +Q(mov) +Q(mov_n) +Q(movi) +TRANSLATE("can only have up to 4 parameters to Xtensa assembly") +TRANSLATE("parameters must be registers in sequence a2 to a5") +TRANSLATE("parameters must be registers in sequence a2 to a5") +TRANSLATE("'%s' expects a register") +TRANSLATE("'%s' expects an integer") +TRANSLATE("'%s' integer %d isn't within range %d..%d") +TRANSLATE("'%s' expects a label") +TRANSLATE("label '%q' not defined") +TRANSLATE("unsupported Xtensa instruction '%s' with %d arguments") |