diff options
Diffstat (limited to 'circuitpython/lib/sdmmc/test')
| -rw-r--r-- | circuitpython/lib/sdmmc/test/CMakeLists.txt | 4 | ||||
| -rw-r--r-- | circuitpython/lib/sdmmc/test/component.mk | 1 | ||||
| -rw-r--r-- | circuitpython/lib/sdmmc/test/test_sd.c | 584 | ||||
| -rw-r--r-- | circuitpython/lib/sdmmc/test/test_sdio.c | 388 |
4 files changed, 977 insertions, 0 deletions
diff --git a/circuitpython/lib/sdmmc/test/CMakeLists.txt b/circuitpython/lib/sdmmc/test/CMakeLists.txt new file mode 100644 index 0000000..d6d5859 --- /dev/null +++ b/circuitpython/lib/sdmmc/test/CMakeLists.txt @@ -0,0 +1,4 @@ +idf_component_register(SRC_DIRS "." + PRIV_INCLUDE_DIRS "." + PRIV_REQUIRES cmock sdmmc + ) diff --git a/circuitpython/lib/sdmmc/test/component.mk b/circuitpython/lib/sdmmc/test/component.mk new file mode 100644 index 0000000..ce464a2 --- /dev/null +++ b/circuitpython/lib/sdmmc/test/component.mk @@ -0,0 +1 @@ +COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive diff --git a/circuitpython/lib/sdmmc/test/test_sd.c b/circuitpython/lib/sdmmc/test/test_sd.c new file mode 100644 index 0000000..fd7051c --- /dev/null +++ b/circuitpython/lib/sdmmc/test/test_sd.c @@ -0,0 +1,584 @@ +// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <time.h> +#include <sys/time.h> +#include <unistd.h> +#include "unity.h" +#include "driver/gpio.h" +#include "soc/soc_caps.h" +#if SOC_SDMMC_HOST_SUPPORTED +#include "driver/sdmmc_host.h" +#endif +#include "driver/sdspi_host.h" +#include "driver/sdmmc_defs.h" +#include "sdmmc_cmd.h" +#include "esp_log.h" +#include "esp_heap_caps.h" +#include "esp_rom_gpio.h" + +// Can't test eMMC (slot 0) and PSRAM together +#ifndef CONFIG_SPIRAM +#define WITH_EMMC_TEST +#endif + +/* power supply enable pin */ +#define SD_TEST_BOARD_VSEL_EN_GPIO 27 + +/* power supply voltage select pin */ +#define SD_TEST_BOARD_VSEL_GPIO 26 +#define SD_TEST_BOARD_VSEL_3V3 1 +#define SD_TEST_BOARD_VSEL_1V8 0 + +#define TEST_SDSPI_DMACHAN 1 + +/* time to wait for reset / power-on */ +#define SD_TEST_BOARD_PWR_RST_DELAY_MS 5 +#define SD_TEST_BOARD_PWR_ON_DELAY_MS 50 + +/* gpio which is not connected to actual CD pin, used to simulate CD behavior */ +#define CD_WP_TEST_GPIO 18 + + +__attribute__((unused)) static void sd_test_board_power_on(void) +{ + gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_OUTPUT); + gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, SD_TEST_BOARD_VSEL_3V3); + gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_OUTPUT); + gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0); + usleep(SD_TEST_BOARD_PWR_RST_DELAY_MS * 1000); + gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 1); + usleep(SD_TEST_BOARD_PWR_ON_DELAY_MS * 1000); +} + +__attribute__((unused)) static void sd_test_board_power_off(void) +{ + gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0); + gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_INPUT); + gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, 0); + gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_INPUT); +} + +TEST_CASE("MMC_RSP_BITS", "[sd]") +{ + uint32_t data[2] = { 0x01234567, 0x89abcdef }; + TEST_ASSERT_EQUAL_HEX32(0x7, MMC_RSP_BITS(data, 0, 4)); + TEST_ASSERT_EQUAL_HEX32(0x567, MMC_RSP_BITS(data, 0, 12)); + TEST_ASSERT_EQUAL_HEX32(0xf0, MMC_RSP_BITS(data, 28, 8)); + TEST_ASSERT_EQUAL_HEX32(0x3, MMC_RSP_BITS(data, 1, 3)); + TEST_ASSERT_EQUAL_HEX32(0x11, MMC_RSP_BITS(data, 59, 5)); +} + +#if SOC_SDMMC_HOST_SUPPORTED + +static void probe_sd(int slot, int width, int freq_khz, int ddr) +{ + sd_test_board_power_on(); + sdmmc_host_t config = SDMMC_HOST_DEFAULT(); + config.slot = slot; + config.max_freq_khz = freq_khz; + sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT(); + if (width == 1) { + config.flags = SDMMC_HOST_FLAG_1BIT; + slot_config.width = 1; + } else if (width == 4) { + config.flags &= ~SDMMC_HOST_FLAG_8BIT; + slot_config.width = 4; + } else { + assert(!ddr && "host driver does not support 8-line DDR mode yet"); + } + if (!ddr) { + config.flags &= ~SDMMC_HOST_FLAG_DDR; + } + TEST_ESP_OK(sdmmc_host_init()); + TEST_ESP_OK(sdmmc_host_init_slot(slot, &slot_config)); + sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t)); + TEST_ASSERT_NOT_NULL(card); + TEST_ESP_OK(sdmmc_card_init(&config, card)); + sdmmc_card_print_info(stdout, card); + uint8_t* buffer = heap_caps_malloc(512, MALLOC_CAP_DMA); + TEST_ESP_OK(sdmmc_read_sectors(card, buffer, 0, 1)); + free(buffer); + TEST_ESP_OK(sdmmc_host_deinit()); + free(card); + sd_test_board_power_off(); +} + +TEST_CASE("probe SD, slot 1, 4-bit", "[sd][test_env=UT_T1_SDMODE]") +{ + probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_PROBING, 0); + probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_DEFAULT, 0); + probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_HIGHSPEED, 0); +} + +TEST_CASE("probe SD, slot 1, 1-bit", "[sd][test_env=UT_T1_SDMODE]") +{ + probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_PROBING, 0); + probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_DEFAULT, 0); + probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_HIGHSPEED, 0); +} + +#ifdef WITH_EMMC_TEST +TEST_CASE("probe eMMC, slot 0, 4-bit, DDR", "[sd][test_env=EMMC]") +{ + probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 1); +} + +TEST_CASE("probe eMMC, slot 0, 8-bit", "[sd][test_env=EMMC]") +{ + probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_PROBING, 0); + probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_DEFAULT, 0); + probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_HIGHSPEED, 0); +} +#endif // WITH_EMMC_TEST + +TEST_CASE("probe SD, slot 0, 4-bit", "[sd][test_env=UT_T1_SDCARD][ignore]") +{ + probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_PROBING, 0); + probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_DEFAULT, 0); + probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 0); +} + +TEST_CASE("probe SD, slot 0, 1-bit", "[sd][test_env=UT_T1_SDCARD][ignore]") +{ + probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_PROBING, 0); + probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_DEFAULT, 0); + probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_HIGHSPEED, 0); +} + +#endif + +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) +//No runners +static void test_sdspi_init_bus(spi_host_device_t host, int mosi_pin, int miso_pin, int clk_pin, int dma_chan) +{ + spi_bus_config_t bus_config = { + .mosi_io_num = mosi_pin, + .miso_io_num = miso_pin, + .sclk_io_num = clk_pin, + .quadwp_io_num = -1, + .quadhd_io_num = -1, + }; + esp_err_t err = spi_bus_initialize(host, &bus_config, dma_chan); + TEST_ESP_OK(err); +} + +static void test_sdspi_deinit_bus(spi_host_device_t host) +{ + esp_err_t err = spi_bus_free(host); + TEST_ESP_OK(err); +} + +static void probe_core(int slot) +{ + sdmmc_host_t config = SDSPI_HOST_DEFAULT(); + config.slot = slot; + + sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t)); + TEST_ASSERT_NOT_NULL(card); + + TEST_ESP_OK(sdmmc_card_init(&config, card)); + sdmmc_card_print_info(stdout, card); + free(card); +} + +static void probe_spi(int freq_khz, int pin_miso, int pin_mosi, int pin_sck, int pin_cs) +{ + sd_test_board_power_on(); + + sdspi_dev_handle_t handle; + sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT(); + dev_config.gpio_cs = pin_cs; + test_sdspi_init_bus(dev_config.host_id, pin_mosi, pin_miso, pin_sck, TEST_SDSPI_DMACHAN); + TEST_ESP_OK(sdspi_host_init()); + TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle)); + + probe_core(handle); + + TEST_ESP_OK(sdspi_host_deinit()); + test_sdspi_deinit_bus(dev_config.host_id); + sd_test_board_power_off(); +} + +static void probe_spi_legacy(int freq_khz, int pin_miso, int pin_mosi, int pin_sck, int pin_cs) +{ + sd_test_board_power_on(); + sdmmc_host_t config = SDSPI_HOST_DEFAULT(); + sdspi_slot_config_t slot_config = SDSPI_SLOT_CONFIG_DEFAULT(); + slot_config.gpio_miso = pin_miso; + slot_config.gpio_mosi = pin_mosi; + slot_config.gpio_sck = pin_sck; + slot_config.gpio_cs = pin_cs; + + TEST_ESP_OK(sdspi_host_init()); + TEST_ESP_OK(sdspi_host_init_slot(config.slot, &slot_config)); + + probe_core(config.slot); + + TEST_ESP_OK(sdspi_host_deinit()); + sd_test_board_power_off(); +} + +TEST_CASE("probe SD in SPI mode, slot 1", "[sd][test_env=UT_T1_SPIMODE]") +{ + probe_spi(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13); + probe_spi_legacy(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13); +} + +TEST_CASE("probe SD in SPI mode, slot 0", "[sd][test_env=UT_T1_SDCARD][ignore]") +{ + probe_spi(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10); + probe_spi_legacy(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10); +} + +#endif //DISABLED(ESP32S2) + +// Fill buffer pointed to by 'dst' with 'count' 32-bit ints generated +// from 'rand' with the starting value of 'seed' +__attribute__((unused)) static void fill_buffer(uint32_t seed, uint8_t* dst, size_t count) { + srand(seed); + for (size_t i = 0; i < count; ++i) { + uint32_t val = rand(); + memcpy(dst + i * sizeof(uint32_t), &val, sizeof(val)); + } +} + +// Check if the buffer pointed to by 'dst' contains 'count' 32-bit +// ints generated from 'rand' with the starting value of 'seed' +__attribute__((unused)) static void check_buffer(uint32_t seed, const uint8_t* src, size_t count) { + srand(seed); + for (size_t i = 0; i < count; ++i) { + uint32_t val; + memcpy(&val, src + i * sizeof(uint32_t), sizeof(val)); + TEST_ASSERT_EQUAL_HEX32(rand(), val); + } +} + +__attribute__((unused)) static void do_single_write_read_test(sdmmc_card_t* card, + size_t start_block, size_t block_count, size_t alignment) +{ + size_t block_size = card->csd.sector_size; + size_t total_size = block_size * block_count; + printf(" %8d | %3d | %d | %4.1f ", start_block, block_count, alignment, total_size / 1024.0f); + + uint32_t* buffer = heap_caps_malloc(total_size + 4, MALLOC_CAP_DMA); + size_t offset = alignment % 4; + uint8_t* c_buffer = (uint8_t*) buffer + offset; + fill_buffer(start_block, c_buffer, total_size / sizeof(buffer[0])); + + struct timeval t_start_wr; + gettimeofday(&t_start_wr, NULL); + TEST_ESP_OK(sdmmc_write_sectors(card, c_buffer, start_block, block_count)); + struct timeval t_stop_wr; + gettimeofday(&t_stop_wr, NULL); + float time_wr = 1e3f * (t_stop_wr.tv_sec - t_start_wr.tv_sec) + 1e-3f * (t_stop_wr.tv_usec - t_start_wr.tv_usec); + + memset(buffer, 0xbb, total_size + 4); + + struct timeval t_start_rd; + gettimeofday(&t_start_rd, NULL); + TEST_ESP_OK(sdmmc_read_sectors(card, c_buffer, start_block, block_count)); + struct timeval t_stop_rd; + gettimeofday(&t_stop_rd, NULL); + float time_rd = 1e3f * (t_stop_rd.tv_sec - t_start_rd.tv_sec) + 1e-3f * (t_stop_rd.tv_usec - t_start_rd.tv_usec); + + printf(" | %6.2f | %5.2f | %6.2f | %5.2f\n", + time_wr, total_size / (time_wr / 1000) / (1024 * 1024), + time_rd, total_size / (time_rd / 1000) / (1024 * 1024)); + check_buffer(start_block, c_buffer, total_size / sizeof(buffer[0])); + free(buffer); +} + +__attribute__((unused)) static void read_write_test(sdmmc_card_t* card) +{ + sdmmc_card_print_info(stdout, card); + printf(" sector | count | align | size(kB) | wr_time(ms) | wr_speed(MB/s) | rd_time(ms) | rd_speed(MB/s)\n"); + do_single_write_read_test(card, 0, 1, 4); + do_single_write_read_test(card, 0, 4, 4); + do_single_write_read_test(card, 1, 16, 4); + do_single_write_read_test(card, 16, 32, 4); + do_single_write_read_test(card, 48, 64, 4); + do_single_write_read_test(card, 128, 128, 4); + do_single_write_read_test(card, card->csd.capacity - 64, 32, 4); + do_single_write_read_test(card, card->csd.capacity - 64, 64, 4); + do_single_write_read_test(card, card->csd.capacity - 8, 1, 4); + do_single_write_read_test(card, card->csd.capacity/2, 1, 4); + do_single_write_read_test(card, card->csd.capacity/2, 4, 4); + do_single_write_read_test(card, card->csd.capacity/2, 8, 4); + do_single_write_read_test(card, card->csd.capacity/2, 16, 4); + do_single_write_read_test(card, card->csd.capacity/2, 32, 4); + do_single_write_read_test(card, card->csd.capacity/2, 64, 4); + do_single_write_read_test(card, card->csd.capacity/2, 128, 4); + do_single_write_read_test(card, card->csd.capacity/2, 1, 1); + do_single_write_read_test(card, card->csd.capacity/2, 8, 1); + do_single_write_read_test(card, card->csd.capacity/2, 128, 1); +} + +#if SOC_SDMMC_HOST_SUPPORTED +void test_sd_rw_blocks(int slot, int width) +{ + sdmmc_host_t config = SDMMC_HOST_DEFAULT(); + config.max_freq_khz = SDMMC_FREQ_HIGHSPEED; + config.slot = slot; + sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT(); + if (width != 0) { + slot_config.width = width; + } + if (slot_config.width == 8) { + config.flags &= ~SDMMC_HOST_FLAG_DDR; + } + TEST_ESP_OK(sdmmc_host_init()); + TEST_ESP_OK(sdmmc_host_init_slot(slot, &slot_config)); + sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t)); + TEST_ASSERT_NOT_NULL(card); + TEST_ESP_OK(sdmmc_card_init(&config, card)); + read_write_test(card); + free(card); + TEST_ESP_OK(sdmmc_host_deinit()); +} + +TEST_CASE("SDMMC read/write test (SD slot 1)", "[sd][test_env=UT_T1_SDMODE]") +{ + sd_test_board_power_on(); + test_sd_rw_blocks(1, 4); + sd_test_board_power_off(); +} + +#ifdef WITH_EMMC_TEST +TEST_CASE("SDMMC read/write test (eMMC slot 0, 4 line DDR)", "[sd][test_env=EMMC]") +{ + sd_test_board_power_on(); + test_sd_rw_blocks(0, 4); + sd_test_board_power_off(); +} + +TEST_CASE("SDMMC read/write test (eMMC slot 0, 8 line)", "[sd][test_env=EMMC]") +{ + sd_test_board_power_on(); + test_sd_rw_blocks(0, 8); + sd_test_board_power_off(); +} +#endif // WITH_EMMC_TEST +#endif // SDMMC_HOST_SUPPORTED + +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) +//No runners +TEST_CASE("SDMMC read/write test (SD slot 1, in SPI mode)", "[sdspi][test_env=UT_T1_SPIMODE]") +{ + sd_test_board_power_on(); + + sdspi_dev_handle_t handle; + sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT(); + test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN); + TEST_ESP_OK(sdspi_host_init()); + TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle)); + + sdmmc_host_t config = SDSPI_HOST_DEFAULT(); + config.slot = handle; + // This test can only run under 20MHz on ESP32, because the runner connects the card to + // non-IOMUX pins of HSPI. + + sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t)); + TEST_ASSERT_NOT_NULL(card); + TEST_ESP_OK(sdmmc_card_init(&config, card)); + read_write_test(card); + TEST_ESP_OK(sdspi_host_deinit()); + free(card); + test_sdspi_deinit_bus(dev_config.host_id); + sd_test_board_power_off(); +} +#endif //DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) + +#if SOC_SDMMC_HOST_SUPPORTED +TEST_CASE("reads and writes with an unaligned buffer", "[sd][test_env=UT_T1_SDMODE]") +{ + sd_test_board_power_on(); + sdmmc_host_t config = SDMMC_HOST_DEFAULT(); + sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT(); + TEST_ESP_OK(sdmmc_host_init()); + + TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config)); + sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t)); + TEST_ASSERT_NOT_NULL(card); + TEST_ESP_OK(sdmmc_card_init(&config, card)); + + const size_t buffer_size = 4096; + const size_t block_count = buffer_size / 512; + const size_t extra = 4; + uint8_t* buffer = heap_caps_malloc(buffer_size + extra, MALLOC_CAP_DMA); + + // Check read behavior: do aligned write, then unaligned read + const uint32_t seed = 0x89abcdef; + fill_buffer(seed, buffer, buffer_size / sizeof(uint32_t)); + TEST_ESP_OK(sdmmc_write_sectors(card, buffer, 0, block_count)); + memset(buffer, 0xcc, buffer_size + extra); + TEST_ESP_OK(sdmmc_read_sectors(card, buffer + 1, 0, block_count)); + check_buffer(seed, buffer + 1, buffer_size / sizeof(uint32_t)); + + // Check write behavior: do unaligned write, then aligned read + fill_buffer(seed, buffer + 1, buffer_size / sizeof(uint32_t)); + TEST_ESP_OK(sdmmc_write_sectors(card, buffer + 1, 8, block_count)); + memset(buffer, 0xcc, buffer_size + extra); + TEST_ESP_OK(sdmmc_read_sectors(card, buffer, 8, block_count)); + check_buffer(seed, buffer, buffer_size / sizeof(uint32_t)); + + free(buffer); + free(card); + TEST_ESP_OK(sdmmc_host_deinit()); + sd_test_board_power_off(); +} +#endif + +__attribute__((unused)) static void test_cd_input(int gpio_cd_num, const sdmmc_host_t* config) +{ + sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t)); + TEST_ASSERT_NOT_NULL(card); + + // SDMMC host should have configured CD as input. + // Enable output as well (not using the driver, to avoid touching input + // enable bits). + esp_rom_gpio_connect_out_signal(gpio_cd_num, SIG_GPIO_OUT_IDX, false, false); + REG_WRITE(GPIO_ENABLE_W1TS_REG, BIT(gpio_cd_num)); + + // Check that card initialization fails if CD is high + REG_WRITE(GPIO_OUT_W1TS_REG, BIT(gpio_cd_num)); + usleep(1000); + TEST_ESP_ERR(ESP_ERR_NOT_FOUND, sdmmc_card_init(config, card)); + + // Check that card initialization succeeds if CD is low + REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_cd_num)); + usleep(1000); + TEST_ESP_OK(sdmmc_card_init(config, card)); + + free(card); +} + +#if SOC_SDMMC_HOST_SUPPORTED +TEST_CASE("CD input works in SD mode", "[sd][test_env=UT_T1_SDMODE]") +{ + sd_test_board_power_on(); + sdmmc_host_t config = SDMMC_HOST_DEFAULT(); + sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT(); + slot_config.gpio_cd = CD_WP_TEST_GPIO; + TEST_ESP_OK(sdmmc_host_init()); + TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config)); + + test_cd_input(CD_WP_TEST_GPIO, &config); + + TEST_ESP_OK(sdmmc_host_deinit()); + sd_test_board_power_off(); +} +#endif + +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) +//No runners +TEST_CASE("CD input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]") +{ + sd_test_board_power_on(); + + sdspi_dev_handle_t handle; + sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT(); + dev_config.gpio_cd = CD_WP_TEST_GPIO; + test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN); + TEST_ESP_OK(sdspi_host_init()); + TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle)); + + sdmmc_host_t config = SDSPI_HOST_DEFAULT(); + config.slot = handle; + + test_cd_input(CD_WP_TEST_GPIO, &config); + + TEST_ESP_OK(sdspi_host_deinit()); + test_sdspi_deinit_bus(dev_config.host_id); + sd_test_board_power_off(); +} +#endif //DISABLED_FOR_TARGETS(ESP32S2) + +__attribute__((unused)) static void test_wp_input(int gpio_wp_num, const sdmmc_host_t* config) +{ + sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t)); + TEST_ASSERT_NOT_NULL(card); + + // SDMMC host should have configured WP as input. + // Enable output as well (not using the driver, to avoid touching input + // enable bits). + esp_rom_gpio_connect_out_signal(gpio_wp_num, SIG_GPIO_OUT_IDX, false, false); + REG_WRITE(GPIO_ENABLE_W1TS_REG, BIT(gpio_wp_num)); + + // Check that the card can be initialized with WP low + REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_wp_num)); + TEST_ESP_OK(sdmmc_card_init(config, card)); + + uint32_t* data = heap_caps_calloc(1, 512, MALLOC_CAP_DMA); + + // Check that card write succeeds if WP is high + REG_WRITE(GPIO_OUT_W1TS_REG, BIT(gpio_wp_num)); + usleep(1000); + TEST_ESP_OK(sdmmc_write_sectors(card, &data, 0, 1)); + + // Check that write fails if WP is low + REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_wp_num)); + usleep(1000); + TEST_ESP_ERR(ESP_ERR_INVALID_STATE, sdmmc_write_sectors(card, &data, 0, 1)); + // ...but reads still work + TEST_ESP_OK(sdmmc_read_sectors(card, &data, 0, 1)); + + free(data); + free(card); +} + +#if SOC_SDMMC_HOST_SUPPORTED +TEST_CASE("WP input works in SD mode", "[sd][test_env=UT_T1_SDMODE]") +{ + sd_test_board_power_on(); + sdmmc_host_t config = SDMMC_HOST_DEFAULT(); + sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT(); + slot_config.gpio_wp = CD_WP_TEST_GPIO; + TEST_ESP_OK(sdmmc_host_init()); + TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config)); + + test_wp_input(CD_WP_TEST_GPIO, &config); + + TEST_ESP_OK(sdmmc_host_deinit()); + sd_test_board_power_off(); +} +#endif + +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) +//No runners +TEST_CASE("WP input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]") +{ + sd_test_board_power_on(); + + sdspi_dev_handle_t handle; + sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT(); + dev_config.gpio_wp = CD_WP_TEST_GPIO; + test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN); + + TEST_ESP_OK(sdspi_host_init()); + TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle)); + + sdmmc_host_t config = SDSPI_HOST_DEFAULT(); + config.slot = handle; + + test_wp_input(CD_WP_TEST_GPIO, &config); + + TEST_ESP_OK(sdspi_host_deinit()); + test_sdspi_deinit_bus(dev_config.host_id); + sd_test_board_power_off(); +} +#endif //DISABLED_FOR_TARGETS(ESP32S2) diff --git a/circuitpython/lib/sdmmc/test/test_sdio.c b/circuitpython/lib/sdmmc/test/test_sdio.c new file mode 100644 index 0000000..ecafb16 --- /dev/null +++ b/circuitpython/lib/sdmmc/test/test_sdio.c @@ -0,0 +1,388 @@ +// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include "soc/soc_caps.h" +#if SOC_SDMMC_HOST_SUPPORTED + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include "esp_log.h" +#include "esp_heap_caps.h" +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "driver/gpio.h" +#include "driver/sdmmc_host.h" +#include "driver/sdmmc_defs.h" +#include "sdmmc_cmd.h" +#include "unity.h" + +/* Second ESP32 board attached as follows: + * Master Slave + * IO18 EN + * IO19 IO0 + * IO14 SD_CLK + * IO15 SD_CMD + * IO2 SD_D0 + * IO4 SD_D1 + * IO12 SD_D2 + * IO13 SD_D3 + */ + + +/* TODO: add SDIO slave header files, remove these definitions */ + +#define DR_REG_SLC_MASK 0xfffffc00 + +#define SLCCONF1 (DR_REG_SLC_BASE + 0x60) +#define SLC_SLC0_RX_STITCH_EN (BIT(6)) +#define SLC_SLC0_TX_STITCH_EN (BIT(5)) + +#define SLC0TX_LINK (DR_REG_SLC_BASE + 0x40) +#define SLC_SLC0_TXLINK_PARK (BIT(31)) +#define SLC_SLC0_TXLINK_RESTART (BIT(30)) +#define SLC_SLC0_TXLINK_START (BIT(29)) + +#define DR_REG_SLCHOST_MASK 0xfffffc00 +#define SLCHOST_STATE_W0 (DR_REG_SLCHOST_BASE + 0x64) +#define SLCHOST_CONF_W0 (DR_REG_SLCHOST_BASE + 0x6C) +#define SLCHOST_CONF_W5 (DR_REG_SLCHOST_BASE + 0x80) +#define SLCHOST_WIN_CMD (DR_REG_SLCHOST_BASE + 0x84) + +#define SLC_WIN_CMD_READ 0x80 +#define SLC_WIN_CMD_WRITE 0xC0 +#define SLC_WIN_CMD_S 8 + +#define SLC_THRESHOLD_ADDR 0x1f800 + +static const char* TAG = "sdio_test"; + +static esp_err_t slave_slchost_reg_read(sdmmc_card_t* card, uint32_t addr, uint32_t* out_val) +{ + if ((addr & DR_REG_SLCHOST_MASK) != DR_REG_SLCHOST_BASE) { + ESP_LOGW(TAG, "%s: invalid addr 0x%08x\n", __func__, addr); + return ESP_ERR_INVALID_ARG; + } + return sdmmc_io_read_bytes(card, 1, addr & (~DR_REG_SLCHOST_MASK), out_val, sizeof(*out_val)); +} + +static esp_err_t slave_slchost_reg_write(sdmmc_card_t* card, uint32_t addr, uint32_t val) +{ + if ((addr & DR_REG_SLCHOST_MASK) != DR_REG_SLCHOST_BASE) { + ESP_LOGW(TAG, "%s: invalid addr 0x%08x\n", __func__, addr); + return ESP_ERR_INVALID_ARG; + } + return sdmmc_io_write_bytes(card, 1, addr & (~DR_REG_SLCHOST_MASK), &val, sizeof(val)); +} + +static esp_err_t slave_slc_reg_read(sdmmc_card_t* card, uint32_t addr, uint32_t* val) +{ + if ((addr & DR_REG_SLC_MASK) != DR_REG_SLC_BASE) { + ESP_LOGW(TAG, "%s: invalid addr 0x%08x\n", __func__, addr); + return ESP_ERR_INVALID_ARG; + } + uint32_t word = (addr - DR_REG_SLC_BASE) / 4; + if (word > INT8_MAX) { + return ESP_ERR_INVALID_ARG; + } + + uint32_t window_command = word | (SLC_WIN_CMD_READ << SLC_WIN_CMD_S); + esp_err_t err = slave_slchost_reg_write(card, SLCHOST_WIN_CMD, window_command); + if (err != ESP_OK) { + return err; + } + + return slave_slchost_reg_read(card, SLCHOST_STATE_W0, val); +} + +static esp_err_t slave_slc_reg_write(sdmmc_card_t* card, uint32_t addr, uint32_t val) +{ + if ((addr & DR_REG_SLC_MASK) != DR_REG_SLC_BASE) { + ESP_LOGW(TAG, "%s: invalid addr 0x%08x\n", __func__, addr); + return ESP_ERR_INVALID_ARG; + } + uint32_t word = (addr - DR_REG_SLC_BASE) / 4; + if (word > INT8_MAX) { + return ESP_ERR_INVALID_ARG; + } + + esp_err_t err = slave_slchost_reg_write(card, SLCHOST_CONF_W5, val); + if (err != ESP_OK) { + return err; + } + + uint32_t window_command = word | (SLC_WIN_CMD_WRITE << SLC_WIN_CMD_S); + return slave_slchost_reg_write(card, SLCHOST_WIN_CMD, window_command); +} + +/** Reset and put slave into download mode */ +static void reset_slave(void) +{ + const int pin_en = 18; + const int pin_io0 = 19; + gpio_config_t gpio_cfg = { + .pin_bit_mask = BIT64(pin_en) | BIT64(pin_io0), + .mode = GPIO_MODE_OUTPUT_OD, + }; + TEST_ESP_OK(gpio_config(&gpio_cfg)); + gpio_set_level(pin_en, 0); + gpio_set_level(pin_io0, 0); + vTaskDelay(10 / portTICK_PERIOD_MS); + gpio_set_level(pin_en, 1); + vTaskDelay(10 / portTICK_PERIOD_MS); + gpio_set_level(pin_io0, 1); +} + +static void sdio_slave_common_init(sdmmc_card_t* card) +{ + uint8_t card_cap; + esp_err_t err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_CARD_CAP, &card_cap); + TEST_ESP_OK(err); + printf("CAP: 0x%02x\n", card_cap); + + uint8_t hs; + err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_HIGHSPEED, &hs); + TEST_ESP_OK(err); + printf("HS: 0x%02x\n", hs); + + +#define FUNC1_EN_MASK (BIT(1)) + + uint8_t ioe; + err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_FN_ENABLE, &ioe); + TEST_ESP_OK(err); + printf("IOE: 0x%02x\n", ioe); + + uint8_t ior = 0; + err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_FN_READY, &ior); + TEST_ESP_OK(err); + printf("IOR: 0x%02x\n", ior); + + // enable function 1 + ioe |= FUNC1_EN_MASK; + err = sdmmc_io_write_byte(card, 0, SD_IO_CCCR_FN_ENABLE, ioe, NULL); + TEST_ESP_OK(err); + + err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_FN_ENABLE, &ioe); + TEST_ESP_OK(err); + printf("IOE: 0x%02x\n", ioe); + + // wait for the card to become ready + while ( (ior & FUNC1_EN_MASK) == 0 ) { + err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_FN_READY, &ior); + TEST_ESP_OK(err); + printf("IOR: 0x%02x\n", ior); + } + + // get interrupt status + uint8_t ie; + err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_INT_ENABLE, &ie); + TEST_ESP_OK(err); + printf("IE: 0x%02x\n", ie); + + // enable interrupts for function 1&2 and master enable + ie |= BIT(0) | FUNC1_EN_MASK; + err = sdmmc_io_write_byte(card, 0, SD_IO_CCCR_INT_ENABLE, ie, NULL); + TEST_ESP_OK(err); + + err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_INT_ENABLE, &ie); + TEST_ESP_OK(err); + printf("IE: 0x%02x\n", ie); +} + +/** Common for all SDIO devices, set block size for specific function */ +static void sdio_slave_set_blocksize(sdmmc_card_t* card, int function, uint16_t bs) +{ + const uint8_t* bs_u8 = (const uint8_t*) &bs; + uint16_t bs_read = 0; + uint8_t* bs_read_u8 = (uint8_t*) &bs_read; + uint32_t offset = SD_IO_FBR_START * function; + TEST_ESP_OK( sdmmc_io_write_byte(card, 0, offset + SD_IO_CCCR_BLKSIZEL, bs_u8[0], NULL)); + TEST_ESP_OK( sdmmc_io_write_byte(card, 0, offset + SD_IO_CCCR_BLKSIZEH, bs_u8[1], NULL)); + TEST_ESP_OK( sdmmc_io_read_byte(card, 0, offset + SD_IO_CCCR_BLKSIZEL, &bs_read_u8[0])); + TEST_ESP_OK( sdmmc_io_read_byte(card, 0, offset + SD_IO_CCCR_BLKSIZEH, &bs_read_u8[1])); + TEST_ASSERT_EQUAL_HEX16(bs, bs_read); +} + +/** + * ESP32 ROM code does not set some SDIO slave registers to the defaults + * we need, this function clears/sets some bits. + */ +static void esp32_slave_init_extra(sdmmc_card_t* card) +{ + printf("Initialize some ESP32 SDIO slave registers\n"); + + uint32_t reg_val; + TEST_ESP_OK( slave_slc_reg_read(card, SLCCONF1, ®_val) ); + reg_val &= ~(SLC_SLC0_RX_STITCH_EN | SLC_SLC0_TX_STITCH_EN); + TEST_ESP_OK( slave_slc_reg_write(card, SLCCONF1, reg_val) ); + + TEST_ESP_OK( slave_slc_reg_read(card, SLC0TX_LINK, ®_val) ); + reg_val |= SLC_SLC0_TXLINK_START; + TEST_ESP_OK( slave_slc_reg_write(card, SLC0TX_LINK, reg_val) ); +} + +/** + * ESP32 bootloader implements "SIP" protocol which can be used to exchange + * some commands, events, and data packets between the host and the slave. + * This function sends a SIP command, testing CMD53 block writes along the way. + */ +static void esp32_send_sip_command(sdmmc_card_t* card) +{ + printf("Test block write using CMD53\n"); + const size_t block_size = 512; + uint8_t* data = heap_caps_calloc(1, block_size, MALLOC_CAP_DMA); + struct sip_cmd_bootup { + uint32_t boot_addr; + uint32_t discard_link; + }; + struct sip_cmd_write_reg { + uint32_t addr; + uint32_t val; + }; + struct sip_hdr { + uint8_t fc[2]; + uint16_t len; + uint32_t cmdid; + uint32_t seq; + }; + + struct sip_hdr* hdr = (struct sip_hdr*) data; + size_t len; + +#define SEND_WRITE_REG_CMD + +#ifdef SEND_WRITE_REG_CMD + struct sip_cmd_write_reg *write_reg = (struct sip_cmd_write_reg*) (data + sizeof(*hdr)); + len = sizeof(*hdr) + sizeof(*write_reg); + hdr->cmdid = 3; /* SIP_CMD_WRITE_REG */ + write_reg->addr = GPIO_ENABLE_W1TS_REG; + write_reg->val = BIT(0) | BIT(2) | BIT(4); /* Turn of RGB LEDs on WROVER-KIT */ +#else + struct sip_cmd_bootup *bootup = (struct sip_cmd_bootup*) (data + sizeof(*hdr)); + len = sizeof(*hdr) + sizeof(*bootup); + hdr->cmdid = 5; /* SIP_CMD_BOOTUP */ + bootup->boot_addr = 0x4005a980; /* start_tb_console function in ROM */ + bootup->discard_link = 1; +#endif + hdr->len = len; + + TEST_ESP_OK( sdmmc_io_write_blocks(card, 1, SLC_THRESHOLD_ADDR - len, data, block_size) ); + free(data); +} + +static void test_cmd52_read_write_single_byte(sdmmc_card_t* card) +{ + esp_err_t err; + printf("Write bytes to slave's W0_REG using CMD52\n"); + const size_t scratch_area_reg = SLCHOST_CONF_W0 - DR_REG_SLCHOST_BASE; + + const uint8_t test_byte_1 = 0xa5; + const uint8_t test_byte_2 = 0xb6; + // used to check Read-After-Write + uint8_t test_byte_1_raw; + uint8_t test_byte_2_raw; + uint8_t val = 0; + err = sdmmc_io_write_byte(card, 1, scratch_area_reg, test_byte_1, &test_byte_1_raw); + TEST_ESP_OK(err); + TEST_ASSERT_EQUAL_UINT8(test_byte_1, test_byte_1_raw); + err = sdmmc_io_write_byte(card, 1, scratch_area_reg + 1, test_byte_2, &test_byte_2_raw); + TEST_ESP_OK(err); + TEST_ASSERT_EQUAL_UINT8(test_byte_2, test_byte_2_raw); + + printf("Read back bytes using CMD52\n"); + TEST_ESP_OK(sdmmc_io_read_byte(card, 1, scratch_area_reg, &val)); + TEST_ASSERT_EQUAL_UINT8(test_byte_1, val); + + TEST_ESP_OK(sdmmc_io_read_byte(card, 1, scratch_area_reg + 1, &val)); + TEST_ASSERT_EQUAL_UINT8(test_byte_2, val); +} + +static void test_cmd53_read_write_multiple_bytes(sdmmc_card_t* card, size_t n_bytes) +{ + printf("Write multiple bytes using CMD53\n"); + const size_t scratch_area_reg = SLCHOST_CONF_W0 - DR_REG_SLCHOST_BASE; + + uint8_t* src = heap_caps_malloc(512, MALLOC_CAP_DMA); + uint32_t* src_32 = (uint32_t*) src; + + for (size_t i = 0; i < (n_bytes + 3) / 4; ++i) { + src_32[i] = rand(); + } + + TEST_ESP_OK(sdmmc_io_write_bytes(card, 1, scratch_area_reg, src, n_bytes)); + ESP_LOG_BUFFER_HEX(TAG, src, n_bytes); + + printf("Read back using CMD52\n"); + uint8_t* dst = heap_caps_malloc(512, MALLOC_CAP_DMA); + for (size_t i = 0; i < n_bytes; ++i) { + TEST_ESP_OK(sdmmc_io_read_byte(card, 1, scratch_area_reg + i, &dst[i])); + } + ESP_LOG_BUFFER_HEX(TAG, dst, n_bytes); + TEST_ASSERT_EQUAL_UINT8_ARRAY(src, dst, n_bytes); + + printf("Read back using CMD53\n"); + TEST_ESP_OK(sdmmc_io_read_bytes(card, 1, scratch_area_reg, dst, n_bytes)); + ESP_LOG_BUFFER_HEX(TAG, dst, n_bytes); + TEST_ASSERT_EQUAL_UINT8_ARRAY(src, dst, n_bytes); + + free(src); + free(dst); +} + + +TEST_CASE("can probe and talk to ESP32 SDIO slave", "[sdio][ignore]") +{ + reset_slave(); + + /* Probe */ + sdmmc_host_t config = SDMMC_HOST_DEFAULT(); + config.flags = SDMMC_HOST_FLAG_1BIT; + config.max_freq_khz = SDMMC_FREQ_PROBING; + + sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT(); + (sdmmc_host_init()); + (sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config)); + sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t)); + TEST_ASSERT_NOT_NULL(card); + TEST_ESP_OK(sdmmc_card_init(&config, card)); + sdmmc_card_print_info(stdout, card); + + /* Set up standard SDIO registers */ + sdio_slave_common_init(card); + + srand(0); + for (int repeat = 0; repeat < 4; ++repeat) { + test_cmd52_read_write_single_byte(card); + test_cmd53_read_write_multiple_bytes(card, 1); + test_cmd53_read_write_multiple_bytes(card, 2); + test_cmd53_read_write_multiple_bytes(card, 3); + test_cmd53_read_write_multiple_bytes(card, 4); + test_cmd53_read_write_multiple_bytes(card, 5); + test_cmd53_read_write_multiple_bytes(card, 23); + test_cmd53_read_write_multiple_bytes(card, 24); + } + + sdio_slave_set_blocksize(card, 0, 512); + sdio_slave_set_blocksize(card, 1, 512); + + esp32_slave_init_extra(card); + + esp32_send_sip_command(card); + + TEST_ESP_OK(sdmmc_host_deinit()); + free(card); +} + +#endif //SOC_SDMMC_HOST_SUPPORTED |