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| author | Satya Durga Srinivasu Prabhala <satyap@codeaurora.org> | 2016-04-07 09:09:47 -0700 |
|---|---|---|
| committer | Kyle Yan <kyan@codeaurora.org> | 2016-04-29 14:39:45 -0700 |
| commit | 9dc92603102b1903e3936a06155f97ddc3a2d90d (patch) | |
| tree | 9f800926a4184c58543fe268cad6ec3cdb6a93cf /mm/page_alloc.c | |
| parent | 0030d5f8d5757725a789ffdbc9662e0efedf924d (diff) | |
drivers: GICv3: Add isb() before mb() per GICv3 requirement
commit 0df0dc1c3f0f ("drivers: GICv3: Add mb() after the read of the
IAR1_EL1 and other registers") added mb() for ICC_IAR1_EL1,
ICC_PMR_EL1 and ICC_SGI1R_EL1. But, as per the GICv3 requirement,
an "ISB" or other context synchronization operation must precede the
"DSB" to ensure visibility of System register writes.
Change-Id: I519530cb9c7008aacbad1319f9159887f599dc9b
CRs-Fixed: 1004222
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Diffstat (limited to 'mm/page_alloc.c')
0 files changed, 0 insertions, 0 deletions