summaryrefslogtreecommitdiff
path: root/drivers/gpu/msm/kgsl_pwrctrl.c
diff options
context:
space:
mode:
authorJordan Crouse <jcrouse@codeaurora.org>2016-05-03 14:11:06 -0600
committerCarter Cooper <ccooper@codeaurora.org>2016-07-20 15:19:33 -0600
commitea91f746732c59c45be89ffd1b258955659e6ddc (patch)
treec530a6b43a61c46c4e284f378f9f29d1d362f851 /drivers/gpu/msm/kgsl_pwrctrl.c
parent2e7b23f2afb9ccfcc5b9fcd45ababc9666046695 (diff)
msm: kgsl: Leave the MMU clocks on with the rest of the GPU
It is no longer power efficient to independently enable and disable the MMU clocks. We can safely enable and disable them with the rest of the GPU clocks and take back the infrastructure needed to handle the clocks. CRs-Fixed: 1009124 Change-Id: Ic0dedbadc48095eada9c5fce6004475a2cb0f0a9 Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Diffstat (limited to 'drivers/gpu/msm/kgsl_pwrctrl.c')
-rw-r--r--drivers/gpu/msm/kgsl_pwrctrl.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index da8c8585d31e..2b9eef8b6351 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -1381,6 +1381,9 @@ static void kgsl_pwrctrl_clk(struct kgsl_device *device, int state,
_isense_clk_set_rate(pwr,
pwr->num_pwrlevels - 1);
}
+
+ /* Turn off the IOMMU clocks */
+ kgsl_mmu_disable_clk(&device->mmu);
} else if (requested_state == KGSL_STATE_SLEEP) {
/* High latency clock maintenance. */
for (i = KGSL_MAX_CLKS - 1; i > 0; i--)
@@ -1428,7 +1431,11 @@ static void kgsl_pwrctrl_clk(struct kgsl_device *device, int state,
pwr->gpu_bimc_interface_enabled = 1;
}
}
+
+ /* Turn on the IOMMU clocks */
+ kgsl_mmu_enable_clk(&device->mmu);
}
+
}
}