Merge android-4.4@64a73ff (v4.4.76) into msm-4.4

* refs/heads/tmp-64a73ff:
  Linux 4.4.76
  KVM: nVMX: Fix exception injection
  KVM: x86: zero base3 of unusable segments
  KVM: x86/vPMU: fix undefined shift in intel_pmu_refresh()
  KVM: x86: fix emulation of RSM and IRET instructions
  cpufreq: s3c2416: double free on driver init error path
  iommu/amd: Fix incorrect error handling in amd_iommu_bind_pasid()
  iommu: Handle default domain attach failure
  iommu/vt-d: Don't over-free page table directories
  ocfs2: o2hb: revert hb threshold to keep compatible
  x86/mm: Fix flush_tlb_page() on Xen
  x86/mpx: Correctly report do_mpx_bt_fault() failures to user-space
  ARM: 8685/1: ensure memblock-limit is pmd-aligned
  ARM64/ACPI: Fix BAD_MADT_GICC_ENTRY() macro implementation
  sched/loadavg: Avoid loadavg spikes caused by delayed NO_HZ accounting
  watchdog: bcm281xx: Fix use of uninitialized spinlock.
  xfrm: Oops on error in pfkey_msg2xfrm_state()
  xfrm: NULL dereference on allocation failure
  xfrm: fix stack access out of bounds with CONFIG_XFRM_SUB_POLICY
  jump label: fix passing kbuild_cflags when checking for asm goto support
  ravb: Fix use-after-free on `ifconfig eth0 down`
  sctp: check af before verify address in sctp_addr_id2transport
  net/mlx4_core: Eliminate warning messages for SRQ_LIMIT under SRIOV
  perf probe: Fix to show correct locations for events on modules
  be2net: fix status check in be_cmd_pmac_add()
  s390/ctl_reg: make __ctl_load a full memory barrier
  swiotlb: ensure that page-sized mappings are page-aligned
  coredump: Ensure proper size of sparse core files
  x86/mpx: Use compatible types in comparison to fix sparse error
  mac80211: initialize SMPS field in HT capabilities
  spi: davinci: use dma_mapping_error()
  scsi: lpfc: avoid double free of resource identifiers
  HID: i2c-hid: Add sleep between POWER ON and RESET
  kernel/panic.c: add missing \n
  ibmveth: Add a proper check for the availability of the checksum features
  vxlan: do not age static remote mac entries
  virtio_net: fix PAGE_SIZE > 64k
  vfio/spapr: fail tce_iommu_attach_group() when iommu_data is null
  drm/amdgpu: check ring being ready before using
  net: dsa: Check return value of phy_connect_direct()
  amd-xgbe: Check xgbe_init() return code
  platform/x86: ideapad-laptop: handle ACPI event 1
  scsi: virtio_scsi: Reject commands when virtqueue is broken
  xen-netfront: Fix Rx stall during network stress and OOM
  swiotlb-xen: update dev_addr after swapping pages
  virtio_console: fix a crash in config_work_handler
  Btrfs: fix truncate down when no_holes feature is enabled
  gianfar: Do not reuse pages from emergency reserve
  powerpc/eeh: Enable IO path on permanent error
  net: bgmac: Remove superflous netif_carrier_on()
  net: bgmac: Start transmit queue in bgmac_open
  net: bgmac: Fix SOF bit checking
  bgmac: Fix reversed test of build_skb() return value.
  mtd: bcm47xxpart: don't fail because of bit-flips
  bgmac: fix a missing check for build_skb
  mtd: bcm47xxpart: limit scanned flash area on BCM47XX (MIPS) only
  MIPS: ralink: fix MT7628 wled_an pinmux gpio
  MIPS: ralink: fix MT7628 pinmux typos
  MIPS: ralink: Fix invalid assignment of SoC type
  MIPS: ralink: fix USB frequency scaling
  MIPS: ralink: MT7688 pinmux fixes
  net: korina: Fix NAPI versus resources freeing
  MIPS: ath79: fix regression in PCI window initialization
  net: mvneta: Fix for_each_present_cpu usage
  ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
  qla2xxx: Fix erroneous invalid handle message
  scsi: lpfc: Set elsiocb contexts to NULL after freeing it
  scsi: sd: Fix wrong DPOFUA disable in sd_read_cache_type
  KVM: x86: fix fixing of hypercalls
  mm: numa: avoid waiting on freed migrated pages
  block: fix module reference leak on put_disk() call for cgroups throttle
  sysctl: enable strict writes
  usb: gadget: f_fs: Fix possibe deadlock
  drm/vmwgfx: Free hash table allocated by cmdbuf managed res mgr
  ALSA: hda - set input_path bitmap to zero after moving it to new place
  ALSA: hda - Fix endless loop of codec configure
  MIPS: Fix IRQ tracing & lockdep when rescheduling
  MIPS: pm-cps: Drop manual cache-line alignment of ready_count
  MIPS: Avoid accidental raw backtrace
  mm, swap_cgroup: reschedule when neeed in swap_cgroup_swapoff()
  drm/ast: Handle configuration without P2A bridge
  NFSv4: fix a reference leak caused WARNING messages
  netfilter: synproxy: fix conntrackd interaction
  netfilter: xt_TCPMSS: add more sanity tests on tcph->doff
  rtnetlink: add IFLA_GROUP to ifla_policy
  ipv6: Do not leak throw route references
  sfc: provide dummy definitions of vswitch functions
  net: 8021q: Fix one possible panic caused by BUG_ON in free_netdev
  decnet: always not take dst->__refcnt when inserting dst into hash table
  net/mlx5: Wait for FW readiness before initializing command interface
  ipv6: fix calling in6_ifa_hold incorrectly for dad work
  igmp: add a missing spin_lock_init()
  igmp: acquire pmc lock for ip_mc_clear_src()
  net: caif: Fix a sleep-in-atomic bug in cfpkt_create_pfx
  Fix an intermittent pr_emerg warning about lo becoming free.
  af_unix: Add sockaddr length checks before accessing sa_family in bind and connect handlers
  net: Zero ifla_vf_info in rtnl_fill_vfinfo()
  decnet: dn_rtmsg: Improve input length sanitization in dnrmg_receive_user_skb
  net: don't call strlen on non-terminated string in dev_set_alias()
  ipv6: release dst on error in ip6_dst_lookup_tail
  UPSTREAM: selinux: enable genfscon labeling for tracefs

Change-Id: I05ae1d6271769a99ea3817e5066f5ab6511f3254
Signed-off-by: Blagovest Kolenichev <bkolenichev@codeaurora.org>

1 files changed, 161 insertions, 103 deletions

diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index 6c021165ca67..498a94069e6b 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -62,13 +62,84 @@ uint8_t ast_get_index_reg_mask(struct ast_private *ast,
 	return ret;
 }
 
+static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev)
+{
+	struct device_node *np = dev->pdev->dev.of_node;
+	struct ast_private *ast = dev->dev_private;
+	uint32_t data, jregd0, jregd1;
+
+	/* Defaults */
+	ast->config_mode = ast_use_defaults;
+	*scu_rev = 0xffffffff;
+
+	/* Check if we have device-tree properties */
+	if (np && !of_property_read_u32(np, "aspeed,scu-revision-id",
+					scu_rev)) {
+		/* We do, disable P2A access */
+		ast->config_mode = ast_use_dt;
+		DRM_INFO("Using device-tree for configuration\n");
+		return;
+	}
+
+	/* Not all families have a P2A bridge */
+	if (dev->pdev->device != PCI_CHIP_AST2000)
+		return;
+
+	/*
+	 * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge
+	 * is disabled. We force using P2A if VGA only mode bit
+	 * is set D[7]
+	 */
+	jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
+	jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
+	if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) {
+		/* Double check it's actually working */
+		data = ast_read32(ast, 0xf004);
+		if (data != 0xFFFFFFFF) {
+			/* P2A works, grab silicon revision */
+			ast->config_mode = ast_use_p2a;
+
+			DRM_INFO("Using P2A bridge for configuration\n");
+
+			/* Read SCU7c (silicon revision register) */
+			ast_write32(ast, 0xf004, 0x1e6e0000);
+			ast_write32(ast, 0xf000, 0x1);
+			*scu_rev = ast_read32(ast, 0x1207c);
+			return;
+		}
+	}
+
+	/* We have a P2A bridge but it's disabled */
+	DRM_INFO("P2A bridge disabled, using default configuration\n");
+}
 
 static int ast_detect_chip(struct drm_device *dev, bool *need_post)
 {
 	struct ast_private *ast = dev->dev_private;
-	uint32_t data, jreg;
+	uint32_t jreg, scu_rev;
+
+	/*
+	 * If VGA isn't enabled, we need to enable now or subsequent
+	 * access to the scratch registers will fail. We also inform
+	 * our caller that it needs to POST the chip
+	 * (Assumption: VGA not enabled -> need to POST)
+	 */
+	if (!ast_is_vga_enabled(dev)) {
+		ast_enable_vga(dev);
+		DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
+		*need_post = true;
+	} else
+		*need_post = false;
+
+
+	/* Enable extended register access */
+	ast_enable_mmio(dev);
 	ast_open_key(ast);
 
+	/* Find out whether P2A works or whether to use device-tree */
+	ast_detect_config_mode(dev, &scu_rev);
+
+	/* Identify chipset */
 	if (dev->pdev->device == PCI_CHIP_AST1180) {
 		ast->chip = AST1100;
 		DRM_INFO("AST 1180 detected\n");
@@ -80,12 +151,7 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
 			ast->chip = AST2300;
 			DRM_INFO("AST 2300 detected\n");
 		} else if (dev->pdev->revision >= 0x10) {
-			uint32_t data;
-			ast_write32(ast, 0xf004, 0x1e6e0000);
-			ast_write32(ast, 0xf000, 0x1);
-
-			data = ast_read32(ast, 0x1207c);
-			switch (data & 0x0300) {
+			switch (scu_rev & 0x0300) {
 			case 0x0200:
 				ast->chip = AST1100;
 				DRM_INFO("AST 1100 detected\n");
@@ -110,26 +176,6 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
 		}
 	}
 
-	/*
-	 * If VGA isn't enabled, we need to enable now or subsequent
-	 * access to the scratch registers will fail. We also inform
-	 * our caller that it needs to POST the chip
-	 * (Assumption: VGA not enabled -> need to POST)
-	 */
-	if (!ast_is_vga_enabled(dev)) {
-		ast_enable_vga(dev);
-		ast_enable_mmio(dev);
-		DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
-		*need_post = true;
-	} else
-		*need_post = false;
-
-	/* Check P2A Access */
-	ast->DisableP2A = true;
-	data = ast_read32(ast, 0xf004);
-	if (data != 0xFFFFFFFF)
-		ast->DisableP2A = false;
-
 	/* Check if we support wide screen */
 	switch (ast->chip) {
 	case AST1180:
@@ -146,17 +192,12 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
 			ast->support_wide_screen = true;
 		else {
 			ast->support_wide_screen = false;
-			if (ast->DisableP2A == false) {
-				/* Read SCU7c (silicon revision register) */
-				ast_write32(ast, 0xf004, 0x1e6e0000);
-				ast_write32(ast, 0xf000, 0x1);
-				data = ast_read32(ast, 0x1207c);
-				data &= 0x300;
-				if (ast->chip == AST2300 && data == 0x0) /* ast1300 */
-					ast->support_wide_screen = true;
-				if (ast->chip == AST2400 && data == 0x100) /* ast1400 */
-					ast->support_wide_screen = true;
-			}
+			if (ast->chip == AST2300 &&
+			    (scu_rev & 0x300) == 0x0) /* ast1300 */
+				ast->support_wide_screen = true;
+			if (ast->chip == AST2400 &&
+			    (scu_rev & 0x300) == 0x100) /* ast1400 */
+				ast->support_wide_screen = true;
 		}
 		break;
 	}
@@ -220,85 +261,102 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
 
 static int ast_get_dram_info(struct drm_device *dev)
 {
+	struct device_node *np = dev->pdev->dev.of_node;
 	struct ast_private *ast = dev->dev_private;
-	uint32_t data, data2;
-	uint32_t denum, num, div, ref_pll;
+	uint32_t mcr_cfg, mcr_scu_mpll, mcr_scu_strap;
+	uint32_t denum, num, div, ref_pll, dsel;
 
-	if (ast->DisableP2A)
-	{
+	switch (ast->config_mode) {
+	case ast_use_dt:
+		/*
+		 * If some properties are missing, use reasonable
+		 * defaults for AST2400
+		 */
+		if (of_property_read_u32(np, "aspeed,mcr-configuration",
+					 &mcr_cfg))
+			mcr_cfg = 0x00000577;
+		if (of_property_read_u32(np, "aspeed,mcr-scu-mpll",
+					 &mcr_scu_mpll))
+			mcr_scu_mpll = 0x000050C0;
+		if (of_property_read_u32(np, "aspeed,mcr-scu-strap",
+					 &mcr_scu_strap))
+			mcr_scu_strap = 0;
+		break;
+	case ast_use_p2a:
+		ast_write32(ast, 0xf004, 0x1e6e0000);
+		ast_write32(ast, 0xf000, 0x1);
+		mcr_cfg = ast_read32(ast, 0x10004);
+		mcr_scu_mpll = ast_read32(ast, 0x10120);
+		mcr_scu_strap = ast_read32(ast, 0x10170);
+		break;
+	case ast_use_defaults:
+	default:
 		ast->dram_bus_width = 16;
 		ast->dram_type = AST_DRAM_1Gx16;
 		ast->mclk = 396;
+		return 0;
 	}
-	else
-	{
-		ast_write32(ast, 0xf004, 0x1e6e0000);
-		ast_write32(ast, 0xf000, 0x1);
-		data = ast_read32(ast, 0x10004);
-
-		if (data & 0x40)
-			ast->dram_bus_width = 16;
-		else
-			ast->dram_bus_width = 32;
 
-		if (ast->chip == AST2300 || ast->chip == AST2400) {
-			switch (data & 0x03) {
-			case 0:
-				ast->dram_type = AST_DRAM_512Mx16;
-				break;
-			default:
-			case 1:
-				ast->dram_type = AST_DRAM_1Gx16;
-				break;
-			case 2:
-				ast->dram_type = AST_DRAM_2Gx16;
-				break;
-			case 3:
-				ast->dram_type = AST_DRAM_4Gx16;
-				break;
-			}
-		} else {
-			switch (data & 0x0c) {
-			case 0:
-			case 4:
-				ast->dram_type = AST_DRAM_512Mx16;
-				break;
-			case 8:
-				if (data & 0x40)
-					ast->dram_type = AST_DRAM_1Gx16;
-				else
-					ast->dram_type = AST_DRAM_512Mx32;
-				break;
-			case 0xc:
-				ast->dram_type = AST_DRAM_1Gx32;
-				break;
-			}
-		}
+	if (mcr_cfg & 0x40)
+		ast->dram_bus_width = 16;
+	else
+		ast->dram_bus_width = 32;
 
-		data = ast_read32(ast, 0x10120);
-		data2 = ast_read32(ast, 0x10170);
-		if (data2 & 0x2000)
-			ref_pll = 14318;
-		else
-			ref_pll = 12000;
-
-		denum = data & 0x1f;
-		num = (data & 0x3fe0) >> 5;
-		data = (data & 0xc000) >> 14;
-		switch (data) {
-		case 3:
-			div = 0x4;
+	if (ast->chip == AST2300 || ast->chip == AST2400) {
+		switch (mcr_cfg & 0x03) {
+		case 0:
+			ast->dram_type = AST_DRAM_512Mx16;
 			break;
-		case 2:
+		default:
 		case 1:
-			div = 0x2;
+			ast->dram_type = AST_DRAM_1Gx16;
 			break;
-		default:
-			div = 0x1;
+		case 2:
+			ast->dram_type = AST_DRAM_2Gx16;
+			break;
+		case 3:
+			ast->dram_type = AST_DRAM_4Gx16;
+			break;
+		}
+	} else {
+		switch (mcr_cfg & 0x0c) {
+		case 0:
+		case 4:
+			ast->dram_type = AST_DRAM_512Mx16;
+			break;
+		case 8:
+			if (mcr_cfg & 0x40)
+				ast->dram_type = AST_DRAM_1Gx16;
+			else
+				ast->dram_type = AST_DRAM_512Mx32;
+			break;
+		case 0xc:
+			ast->dram_type = AST_DRAM_1Gx32;
 			break;
 		}
-		ast->mclk = ref_pll * (num + 2) / (denum + 2) * (div * 1000);
 	}
+
+	if (mcr_scu_strap & 0x2000)
+		ref_pll = 14318;
+	else
+		ref_pll = 12000;
+
+	denum = mcr_scu_mpll & 0x1f;
+	num = (mcr_scu_mpll & 0x3fe0) >> 5;
+	dsel = (mcr_scu_mpll & 0xc000) >> 14;
+	switch (dsel) {
+	case 3:
+		div = 0x4;
+		break;
+	case 2:
+	case 1:
+		div = 0x2;
+		break;
+	default:
+		div = 0x1;
+		break;
+	}
+	ast->mclk = ref_pll * (num + 2) / (denum + 2) * (div * 1000);
 	return 0;
 }