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| author | Vince Leung <vincentl@codeaurora.org> | 2015-05-19 13:27:50 -0700 |
|---|---|---|
| committer | Rohit Vaswani <rvaswani@codeaurora.org> | 2016-03-01 12:22:14 -0800 |
| commit | a1efe43c52eb79045b1b47b8f4d109aa143f6108 (patch) | |
| tree | 9e757ff63498a8f74c3be3cd0a0f0ab5846c7a16 /arch/arm/kernel/stacktrace.c | |
| parent | 486155f53e2180d5fac41e85bb12cf8755e12241 (diff) | |
arm64: entry: add support for CONFIG_ARM64_REG_REBALANCE_ON_CTX_SW
Add support for re-balancing register rename pools on context
switches, for a potential performance boost on some ARM64 targets.
Change-Id: I7577c11fac566ae91a210787c70b23591bfbd693
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
Diffstat (limited to 'arch/arm/kernel/stacktrace.c')
0 files changed, 0 insertions, 0 deletions