| Commit message (Collapse) | Author | Age |
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Make sure pll regulator is enabled as part of the phy
on sequence. This fixes some corruption observed
when pll is disabled as part of the phy shut-down
sequence.
Change-Id: I1ace97dbf5b8e5ed8fceedddf714758a5f708cfb
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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As per HDMI specification a source should try to re-read the EDID
in case there is error during the EDID buffer read, like checksum
mismatch or EDID header not correct. So retry for maximum allowed
attempts when EDID read fails due to any reason.
Change-Id: I04b222271cf22834dc0ea6355cd78a7492e24f27
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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Some platforms may use external gpio to enable and disable backlight,
and we may need to invert this gpio according to HW design,
so add support for that.
CRs-Fixed: 1109294
Change-Id: Ib5e895eebcc38d185e8b703c3d895781b43c58c7
Signed-off-by: Yahui Wang <yahuiw@codeaurora.org>
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In the current implementation DSI timing db(Double Buffering)
mode is set as part of DSI controller initialization. This is
causing DSI command transfer failures when sending panel init
commands during device resume for some platforms like SDM660.
Since on these platforms DSI_CMD_OFFSET and DSI_CMD_LENGTH
register has now become double buffered and hence would need a
control flush, for these registers to take effect. But control
flush in driver does not happen until panel init is done properly.
So removing the programing of timing db registers from DSI host
initialization sequence as this is already taken care during dynamic
refresh rate change usecase.
Change-Id: Ia08788127f4d132530e3f3a28efd9d7ee9869483
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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For split display panels, when panel has 180 flip or HFLIP,
the source layers needs to be swapped instead of the mixers.
SDM will take care of the source swap and rectangle
recalculations.
This change is to remove the mixer swap, and to expose the panel
flip property through sysfs, so that SDM can flip the source
layers to maintain pipe priority.
Change-Id: I47a7dd38dc1e45dd3f7edbd189c9403900b74eea
Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
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If MDP fence timeout happens, then to handle it gracefully
we stage border fill. In this regard as the mixer config has
now changed, then ctl flush has to be set.
Starting for Ia510fc6377c5b328cb4225a4725275d86b72dbff, ctl
flush bits were getting reset. Fix this in case mixer is
setup again with borderfill.
Change-Id: I12f60472e8f0f5630e239fb4b4026fda0d2f7cba
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Harsh Sahu <hsahu@codeaurora.org>
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Dynamic refresh done interrupt is received and it is cleared.
Unmasking of PLL_UNLOCKED interrupt should be done only after
checking if RESETSM_READY_STATUS.CORE_READY is 1. This would
ensure that the clocks are in proper state before PLL_UNLOCKED
interrupt is unmasked.
Change-Id: I5d5762fada1a0722d0eb71fd9006d14e847ca388
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
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When parsing topology dtsi struct the return value gets set while
checking for qcom,split-mode. When this node and DSC construct
are not present, the rc value gets set as INVALID incorrectly.
This change prevents that scenario.
Change-Id: Id358e0d46ca5eacc75c5e7ff0064ff67f1b7e356
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
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When dynamically switching modes from DSC on to off, the
compression mode control register should be set to 0 to
avoid corruption on the output.
Change-Id: Id4387063b767bf0f307c13831b9c6ecc31c20650
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
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This change advertizes hdr feature support to
user space driver on msm8998.
Change-Id: I6b81f64d14e472b563e2ee3ea86198be82c58920
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
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If any of the calls to kmalloc fail then the value of ret becomes
non-zero. Hence the code in the if condition gets executed. Then in
"exit" section ret is set again to non-zero value. The program jumps
back to the exit label and the code in the if condition gets executed
again leading to an infinite loop. Removing the goto exit line will
avoid the possible infinite loop forming when kmalloc fails.
Change-Id: I0d7d7d3d6d65806ede866667a7030fb9d1e0480e
Signed-off-by: Harsh Sahu <hsahu@codeaurora.org>
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Currently, cwb buffers are allocated and mapped during
commit but not unmapped, leaving the kernel refcounts
intact which would eventually cause memory issues. Fix it
by adding the buffer to a cleanup queue after mapping and
unmap/free the buffer in the work queue after cwb intr done.
Change-Id: I2bb41a4fadc58ecedb1fafacf6821ce6376b1b4d
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
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LUT_CTRL register is present in the QSEED3 sub block. This change
adds the correct offset for each pipe for this register so that it
does not over write the LUT coeff and hang the LUT HW.
CRs-Fixed:1062539
Change-Id: Ica36733466be474b7b3bc8de52e55fa5cb7a011f
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
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DSI phy v2 is used on msm8996 and sdm660. Update the phy
timing device node property to mention the correct DSI PHY
version. This will ensure that proper naming convention is
followed across msm8996 and sdm660 target.
Change-Id: Idd88110ddebf2dd38cfe375ac1bf3804ce4bb4d0
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
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In targets with dedicated writeback paths, the FPS isn't
set properly for BW calculations for WB cases. Setting
the FPS to default frame rate, for such cases.
Change-Id: I83c545f3344ee5fc3d356f0e08d3c20453e22b31
Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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Commit dd7ad27eb3de6b088b6525b066c40f5a29ac4c60 ("msm: mdss: fix
race condition between iommu attach and sending DCS cmds") protected
the iommu attach/detach to fix possible race condition between the
display thread and DCS cmd sending from ESD or some other thread with
iommu_lock. But this still leaves possibility of race condition based
on iommu_attached status flag.
-> Display thread finishes the attach and releases the iommu lock
-> DCS cmd thread gets the iommu lock and checks iommu_attached
status before display thread could change it.
Protect the iommu_attached status variable along with iommu
attach/detach to avoid such cases.
Change-Id: I42d0ced5cbfd741cf02ad71c80c4f01dde37f647
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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Memset commit structure in compat path ioctl as some
of the pointer variables might go uninitialized, if not
explicitly initialized by the userspace. These uninitialized
variables contain garbage values which can further result
in kernel crash.
Change-Id: I09518a43438e27751f2b918d682f551550c4342e
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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Added sysfs node on mdss to get fps value at runtime.
The calculation is time based where in mdss driver
counts number of frames transferred for every 1 second.
Change-Id: I6f38298d066852d1a41cb90167aa41f594eec9c0
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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WB timeouts are seen when WB is connected after 4k HDMI
use case. This was seen when WB is using the same mixer
which was earlier used by HDMI, with 3D Mux enabled.
Since 3D Mux registers are double buffered, the best way
to clear control operations is to re-use the control path.
Hence allowing WB to choose the first available control
path.
Change-Id: Ie599a6d58f461ee7905402bf0a948ac829d8de12
Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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FB driver will call this function even if there is no MDP.
mdss_mdp_get_mdata will return NULL in that scenario and needs to be
checked.
Change-Id: Icebed1bc9b4da214fec2ca924590403d1656fa5d
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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Add fence name to the warning message instead of sync pt
data fence, to help in debugging sync fence timeout issues.
Change-Id: I4bee08786ff3fc7f6109afcf923df46e76ad1619
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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Update structures in mdss compat layer with the new
interface changes in mdss headers, so that 32_to_64
backward compatibility is maintained.
Change-Id: I1b75ee6d0d13438fedbaf045a3cdc7f47bf32ba2
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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Dynamic fps should be set to max fps supported if it is out of
range. Configure the clocks based on the max fps set.
Change-Id: Ied2d4803c0840be00929b7093601aab39930b3e9
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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At present the ctl->offlock mutex is used for synchronization
between ESD thread and OFF sequence. Using the same mutex
for synchronization between add_vsync_handler() and OFF
sequence was causing unnecessary synchronization between
ESD thread and add_vsyc_handler(). To improve performance
a new mutex, cmd_off_mtx is used for the second case.
Change-Id: I7d0b0690672869937d82df68ea9f571023fc88d1
Signed-off-by: Shalini Krishnamoorthi <shakri@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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Fixing potential NULL pointer dereferences in MDSS driver.
Change-Id: Ibaa6b8adec966737b41c36f530ae88a968d5d5ed
Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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Initialize the pan_name array to 0 before trying to copy
data from mdss_mdp_panel array to prevent junk values
being wrongly parsed by strnstr function and return error
when panel name is '0', this would let us read the primary
panel interface from device tree.
Change-Id: I07bfc1f7195f6cc61dfd3e470d2e3e3e43c0049d
Signed-off-by: Shalini Krishnamoorthi <shakri@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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'commit 3bf808d38b78b55eb2bf686555a0c2f371eccdf2 ("msm:
fb: add mdp foot switch for multiple splash displays")'
considers DSI0 and DSI1 as separate displays even if
split display is enabled. So the number of displays
are calculated as 2 whereas the driver considers this
as a single display. This causes MDP clocks to remain
ON. This change corrects number of displays calculated
by checking for split display.
Change-Id: Ie0d3dbbcb93cc86b88a8b903fd1f7ccd89a8a871
Signed-off-by: Krishna Srinivas <krisrini@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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If there are multiple splash displays enabled in LK, mdp foot switch
needs to perform multiple times. Otherwise, clock resources are not
enabled/disabled symmetrically.
Change-Id: Iaca1163f44883be9e027460c48bd0ebc0ec2266a
Signed-off-by: Camus Wong <camusw@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
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