| Commit message (Collapse) | Author | Age |
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Enable 11ad msm platform driver by default. The driver
must be built-in within kernel so that by default it turns
off any power related to the 11ad chipset when connected
to msm.
Change-Id: Ice3a85fcd5e3c10fbe3193d52d6d4cf26f0abe74
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
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On platforms where the power supply for 11AD is external
the wil6210 driver has to vote for the VDD and VDDIO regulators.
This patch adds such voting and guarantees the required
voltage for each regulator.
Change-Id: I472fe6b0600557bc4e623a3dd1b6352fd4a86e27
[merez@codeaurora.org: using regulator_set_load]
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Add 11ad as a subsystem (WIGIG) within the subsystem_restart
framework, in order to allow proper support for recovery from
11ad firmware crashes, and support automated collection of
crash dumps for offline analysis and bug reporting.
Change-Id: I7acbe8860e046cdba2ce027f91ed2fa995a70c70
Signed-off-by: Lior David <liord@codeaurora.org>
[merez@codeaurora.org: fixed merge conflicts]
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Some platforms don't support the wigig_en GPIO.
Changing wigig_en to be an optional property allows
removing the redundant setting of this GPIO in platforms
that do not support it.
Change-Id: Iad33d3876c1657cc4cc6b779b11d1c634f58a243
Signed-off-by: Maya Erez <merez@codeaurora.org>
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msm root-complex does not maintain parent/child relationship
with PCIe devices. Due to this, suspend operation may be carried
out asynchronously between PCIe device and root-complex.
In cases where 11ad refuses to suspend for any reason, the
root-complex connected to it may get suspended in parallel,
causing inconsistency between root-complex and 11ad device.
Disabling async suspend ensures proper ordering of suspend
between PCIe device and root-complex.
Change-Id: I42749d6af229721dc420b55b91e78bf58923d67f
CRs-Fixed: 933571
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Sleep clock may be used by 11ad chip to support
low power modes.
Change-Id: I00c9c5f3d24fa47463f5d0fe4aecc97ab09334b9
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
[merez@codeaurora.org: fixed merge conflicts]
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Config space was not properly restored when
resuming from suspend.
Change-Id: I6b9188f3989957eb44c93302d7958d422bb29e81
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Align msm_11ad driver with commit:
5d186c1a1f152c480b51772764d53f66c2a657ca - arm64: dma-mapping:
remove order parameter from arm_iommu_create_mapping()
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Set DOMAIN_ATTR_ATOMIC attribute to SMMU driver so that
it can handle DMA map/unmap operations from atomic context
which is required by 11ad driver
Change-Id: I7e538e6c41e5f40ff01dcfc9cbecf860ded22057
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Larger delay is required when using perf build
Change-Id: I1f24aa181e0f6982ec637a24a0ae543e87b500cc
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Delay is required to wait for the PCIe endpoint to become
stable after power on before de-assertion of PERST to
the endpoint by PCIe root complex.
Change-Id: Ib064e936fa0540646e6751d7c3b739c0beb48e60
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Failure of memory allocation for context was
not properly checked. Added proper check against
valid context value in relevant locations.
Change-Id: Ia74ddfb3c54e2781957e695a831c30f1356fed08
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Platform driver used to handle msm specific platform
requirement for 11ad chipset connected to msm platform
Takes care of platform support like:
- power switch through dedicated GPIO
- bus frequency voting
- SMMU attachment
Change-Id: I09c54ea747a5b4e0688b1b7d96e83ef134bb4215
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
[merez@codeaurora.org: fix merge conflicts]
Signed-off-by: Maya Erez <merez@codeaurora.org>
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The TYPE for a PMIC chip is always 0x51. There is no need to define it
for each PMIC chip.
Also the SUBTYPE of a PMIC chip doesn't change with versions. Have a
single definition of the SUBTYPE per PMIC chip.
Also, the driver uses integer indexes to get to the pmic name, instead
use the SUBTYPE to index in the pmic names array.
Change-Id: Ie1c43f3db0d4a395307253aad347ad93624a1203
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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Update the regulator API used in PCIe endpoint driver for 4.4
kernel upgrade.
Change-Id: Iacca851bfbd7f5a5544b97ac82630d9a2dc5ebfc
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Add the support of PCIe Endpoint (EP) mode for mdmcalifornium.
Change-Id: I55c85813e674810d865b444b7e19ce4157cea479
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Update check for valid MSI enable and setting using
MSI_ENABLE bit instead of address and data. Host can
set address and data to 0 therefore check if MSI_ENABLE
is set.
Change-Id: I686c3ed155b8c5c843d12a49218f4720655dcc18
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
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Update the configuration of PCIe PHY based on the version of PHY.
Change-Id: I1faf65c2cc1215cd6ad679d0c4558a17f43db3fc
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Add the support to trigger link training based on PCIe PHY version.
Change-Id: I4c765797d8e8adf5c15effae95da350a0d8ec0c3
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Add the phy reset clock for PCIe endpoint mode and add the support
of this optional clock.
Change-Id: Id92e2fd589d0e97e8a3db2e1eeb1d6c99a464777
Signed-off-by: Yan He <yanhe@codeaurora.org>
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PCIe device ID can't be got from register when the power of the
core is off. Thus, use the saved device ID so that we can turn on
link in the debugfs testing.
Change-Id: I28ec17b4fdf84b130cd32267d097b1c0d7c32aed
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Fix the bug of the power status of PCIe core and update the power
status as soon as power is turned on.
Change-Id: Ib5b550c78a630d36049296daf1291065a1a44cd5
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Update retry counters and intervals for PCIe PHY init and PCIe link
training to accommodate various hosts.
Change-Id: I767de1f08580137559e974c0ef90273ccf5f4b76
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Update the lpeak values of PCIe LDOs based on the updated HW
requirement.
Change-Id: I2f8b63edf3f8571ea960abdebde982324f7f6d74
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Enable L1ss support in L1ss capability register.
Change-Id: I51e6e1bbd8073e7bb88c7e041199d862db020ae7
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Disable debouncers for PCIe endpoint mode.
Change-Id: I504418193920861296d995bd898f01307e6dc518
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Update some read-only PCIe registers with non-arbitrary values
which are required by PCIe compliance testing.
Change-Id: I10fd448f38d874ba582d1a46a98a76d29e0d9cb4
Signed-off-by: Yan He <yanhe@codeaurora.org>
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The logging macro has multiple outputs. If we increase the counter
as a parameter to the logging macro, the counter will be increased
for multiple times. The change here fixes this bug.
Change-Id: I321e281b506e35770e222def86f5b04ae0bfdce2
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Correct the PME configuration for PCIe endpoint to support D0, D3
hot and D3 cold.
Change-Id: Ib906fbafc490be75e5f178176e33882c392d074e
Signed-off-by: Yan He <yanhe@codeaurora.org>
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PCIe client may need to wake up the host when PCIe link is still
on. Add the support to assert wake to host side when PCIe is in
D3hot.
Change-Id: I15ffd5f03183054c7ef5d143757b923f32de0adc
Signed-off-by: Yan He <yanhe@codeaurora.org>
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The MSM PCIe endpoint driver enables the PCIe core in endpoint mode
and handles the control signaling with PCIe root complex on host
side.
Change-Id: Ifc2735e061820762c6040eda44089a2dc26fc065
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Move qpnp-power-on driver as input driver, also update
regulator related api in order to accomodate regualtor
framework
Signed-off-by: Jigarkumar Kishorkumar Zala <j_zala@codeaurora.org>
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Add the MSM SPS (Smart Peripheral Switch) driver.
SPS may be used as a DMA engine to move data in either Peripheral-to-
Peripheral (a.k.a. BAM-to-BAM) mode or Peripheral-to-Memory (a.k.a
BAM-System) mode.
This snapshot is taken as of msm-3.18 commit 132e1315c1
Change-Id: I7ec9781c3b608b9ee0fffdf7ba3e1b33bfa4dfcd
Signed-off-by: Yan He <yanhe@codeaurora.org>
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Change-Id: I80780a6f8d80143c697847abf82579c8e8194090
Signed-off-by: David Dai <daidavid1@codeaurora.org>
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This snapshot is taken as of msm-3.18 commit 1513280 (Merge "platform: msm: msm_bus:
Fix memory leak during client unregister)"
Change Kconfig option to say QCOM_BUS* instead of MSM_BUS*
Change-Id: I6dd9aba5b26984a914714ca49ae7253c1f267b4b
Signed-off-by: David Dai <daidavid1@codeaurora.org>
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The current driver uses irq_read_line api which is not standard.
Instead use a gpio and register for an interrupt when it changes
states. And upon a change in state interrupt is received, read the
gpio state to determine whether it is high or low.
Change-Id: Ie4b1226cedfb44e65a84349da4b3eef5fe988dff
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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fix compiler warnings/errors in some drivers.
Change-Id: Ibc47729b5c5b7c4277bd4666ec56fe8995548b88
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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API's like
power_supply_set_supply_type
power_supply_set_online,
power_supply_set_present
power_supply_set_current_limit
power_supply_set_health_state
power_supply_set_supply_type
power_supply_set_dp_dm
can be replaced by using
power_supply_set_property introduced in the 4.4 kernel.
Update all such callsites to use power_supply_set_property.
Change-Id: I10df60c8012358b6773a8bd1802a26d9540ade9b
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Conflicts:
drivers/power/qpnp-smbcharger.c
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Change to using upstream spmi bus architecture. All the spmi devices,
marked by spmi-dev-container, become platform devices.
spmi-slave-container devices become spmi_devices each representing
a slave. The read/write functions use regmap api's instead of calls to
spmi_ext_register_read/write() implemented by the spmi bus. This
regmap is instantiated per slave.
The spmi bus helper functions like spmi_get_irq get changed to their
platform bus equivalents.
Change Kconfig files include
* Remove dependence on OF_SPMI, MSM_QPNP_INT
* There were few places where an earlier commit
dcc2aedc80746acee589e4b47d3e6adf5d3ec253
missed adding dependence on SPMI along with MSM_SPMI.
Fix them.
* Add depends on ARCH_MSM. ARCH_MSM is used for internal builds.
Change the nodes in DTSI files to confirm to the modified drivers.
Update their binding docs to drop spmi-dev-container and
spmi-slave-container;
Finally update defconfig to use upstream SPMI.
Change-Id: Ic85bff27c09c84b152cb38acbc3cadd05c0ec57a
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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This snapshot is taken as of msm-3.18 commit
9da4ddc (Merge "clk: msm: clock-gcc: Associate gfx rail
voting with gfx3d branch")
Change-Id: Idd2f467f1f1863a156d1757589dfe78158f0e43f
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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AOSP commit a61e4d271cba "Enable adb with android-pipe
in IA image" made GOLDFISH_BUS modular (i.e switched it
to "tristate" in Kconfig from "bool"), which is not
buildable. Instead of fixing the build and supporting
it in modular form, which AOSP doesn't agree with anyway,
lets restore it to the original state ("bool") in the Kconfig.
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
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No need to set .owner here. The core will do it.
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
CC: Lizhe Liu <lizhe.liu@intel.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
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To enable adb for x86/x86_64 Brillo emulator, we bring
drivers/platform/goldfish/ in kernel/common (branch android-3.18)
up to date with that in kernel/goldfish
(branch android-goldfish-3.10), by porting the following patches:
044d26f goldfish: Enable ACPI-based enumeration for android pipe
acf92a5 goldfish_pipe: Pass physical addresses to the device if supported
77559b0 [MIPS] Enable platform support for Goldfish virtual devices
1bebc76 platform: goldfish: pipe: don't log when dropping PIPE_ERROR_AGAIN
3c56d07 platform: goldfish: pipe: add devicetree bindings
ca8dafc android_pipe: Pin pages to memory while copying and other cleanups
b765d47 android_pipe: don't be clever with #define offsets
7119108 goldfish: refactor goldfish platform configs
dc02035 goldfish: fix kernel panic when using multiple adb connection
Change-Id: Ic4f2f5e43ba2a70831d6a12a370417984f784dbc
Signed-off-by: Lizhe Liu <lizhe.liu@intel.com>
Signed-off-by: Tina Zhang <tina.zhang@intel.com>
Signed-off-by: Jason Hu <jia-cheng.hu@intel.com>
Signed-off-by: Yu Ning <yu.ning@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/olof/chrome-platform
Pull chrome platform updates from Olof Johansson:
"Here's the branch of chrome platform changes for v4.4. Some have been
queued up for the full 4.3 release cycle since I forgot to send them
in for that round (rebased early on to deal with fixes conflicts).
Most of these enable EC communication stuff -- Pixel 2015 support,
enabling building for ARM64 platforms, and a few fixes for memory
leaks.
There's also a patch in here to allow reading/writing the verified
boot context, which depends on a sysfs patch acked by Greg"
* tag 'chrome-platform-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/chrome-platform:
platform/chrome: Fix i2c-designware adapter name
platform/chrome: Support reading/writing the vboot context
sysfs: Support is_visible() on binary attributes
platform/chrome: cros_ec: Fix possible leak in led_rgb_store()
platform/chrome: cros_ec: Fix leak in sequence_store()
platform/chrome: Enable Chrome platforms on 64-bit ARM
platform/chrome: cros_ec_dev - Add a platform device ID table
platform/chrome: cros_ec_lpc - Add support for Google Pixel 2
platform/chrome: cros_ec_lpc - Use existing function to check EC result
platform/chrome: Make depends on MFD_CROS_EC instead CROS_EC_PROTO
Revert "platform/chrome: Don't make CHROME_PLATFORMS depends on X86 || ARM"
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Commit d80d134182ba ("i2c: designware: Move common probe code into
i2c_dw_probe()") caused the I2C adapter lookup code here to fail for PCI
enumerated i2c-designware because commit changed the adapter name but
didn't update it here.
Fix the I2C adapter lookup by using the "Synopsys DesignWare I2C adapter"
name.
Reported-by: Jeremiah Mahler <jmmahler@gmail.com>
Fixes: d80d134182ba ("i2c: designware: Move common probe code into i2c_dw_probe()")
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: Jeremiah Mahler <jmmahler@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Some EC implementations include a small nvram space used to store
verified boot context data. This patch offers a way to expose this
data to userspace.
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Emilio López <emilio.lopez@collabora.co.uk>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Function led_rgb_store() contains some direct returns in error cases that
leak the already allocated cros_ec_command message structure. Make sure
that 'msg' is freed in all exit paths. Detected by Coverity CID 1309666.
Signed-off-by: Christian Engelmayer <cengelma@gmx.at>
Signed-off-by: Olof Johansson <olof@lixom.net>
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The allocated cros_ec_command message structure is not freed in function
sequence_store(). Make sure that 'msg' is freed in all exit paths.
Detected by Coverity CID 1309667.
Signed-off-by: Christian Engelmayer <cengelma@gmx.at>
Signed-off-by: Olof Johansson <olof@lixom.net>
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With Chrome running on 64-bit ARM devices, add ARM64 to the list of
supported architectures.
Signed-off-by: Thierry Reding <treding@nvidia.com>
[olof; Fixed up due to addition of COMPILE_TEST]
Signed-off-by: Olof Johansson <olof@lixom.net>
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If the cros_ec_dev driver is built as a module, modalias information is
not filled so the module is not autoloaded. Add a platform device table
and use the MODULE_DEVICE_TABLE() macro to export that information in
the module so user-space can match the modalias uevent and autoload it.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Olof Johansson <olof@lixom.net>
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