| Commit message (Collapse) | Author | Age |
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Define ops_keep_radio_on_during_sleep as static as it is used
only in msm_11ad context.
Change-Id: Id95579961ce5cdd3fbdf063578bd4d9144f8a725
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Change keep_radio_on_during_sleep DT property to follow
the naming convention.
Change-Id: I6450cfdfe38a4cf5b1b1ccb40b5506a34aeb076a
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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When driver calls ops_bus_request with high bandwidth requirement,
affinity of wil6210 interrupt is set to first big core. However this
setting is not cleared when driver lowers bandwidth requirement.
This causes WARN_ON_ONCE(desc->affinity_hint) upon wil6210 rmmod.
Fix this by clearing affinity hint upon low bandwidth request.
Change-Id: I87b6b7ec9b369b84a9d3724d92a821a1302d1f83
Signed-off-by: Dedy Lansky <dlansky@codeaurora.org>
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Transition to D3 hot in system suspend allows the wil6210
device to preserve the active connections in system suspend.
Change-Id: I4c24551f91ee7e59d4bfee02b0911c31ae0a05b1
Signed-off-by: Maya Erez <merez@codeaurora.org>
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In order to preserve the connection in suspend/resume flow,
wil6210 host allows going to PCIe D3hot state in suspend,
instead of performing a full wil6210 device reset. This
requires the platform ability to initiate wakeup in case of
RX data. To check that, a new platform API is added.
In addition, add cfg80211 suspend/resume callbacks
implementation.
Change-Id: I3846eaaa8d6e9ecbe5adbb0c04c7574865d5af5e
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Memory dump table doesn't support de registration, but
when ssr ramdump device creation failed, it frees
the buffer registered with Memory dump table also.
So re-order ramdump device creation to avoid freeing
memory dump table buffer.
Change-Id: I0ac595259159f3d3fe2e5c864dae8a6a1d6b4078
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
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Add Minidump support for clients to get minimum required data
at the time of system crash. The Minidump table resides in SMEM,
BOOT(SBL) will iterate the table entries and dumps out (to USB/Flash)
the data in address location.
Any client can register to this table with static or known addresses,
as currently Minidump doesn't support dumping of dynamic data structures.
To simplify post processing, we create an ELF header, where each entry in
the minidump table is a section in elf header.
If Memory dump table enabled, Dump all data entries registered with MDT.
Enable Minidump:
echo mini > /sys/kernel/dload/dload_mode
Change-Id: I0fc8d21aef71ded34a498426ee3d7f86b063a639
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
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When SMMU stage1 is enabled, set IOVA base and end in geometry
attr to allow PCIe driver to map the GIC MSI address.
Change-Id: I7826a941823a6204143ea077a45c71b22316699b
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Currently when WIGIG FW crashes and SSR is in SYSTEM mode,
SSR causes a kernel panic and its panic handler will call
msm_11ad_ssr_crash_shutdown which will copy the FW crash
dump. However this is done when kernel panic is in progress
and kernel is not fully operational, so sometimes the copy
fails and the FW crash dump will not be found in the DDR
dump from the device.
Fix this problem by copying the FW crash dump before
notifying SSR, so the crash dump will always be copied
correctly when WIGIG FW crashes.
We also keep copying in crash_shutdown so the WIGIG FW
crash dump will be available also after normal kernel
panics, though it is not always copied in this case.
Change-Id: Idabb1497d8a1f60a74191f1c93ec5b2ce3b3043c
Signed-off-by: Lior David <liord@codeaurora.org>
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Add the following changes to support enabling of SMMU stage1:
- Enable DMA coherency and PAGE_TABLE_FORCE_COHERENT attr
to allow cache coherency when SMMU stage1 is enabled
- Add the option to define SMMU base address and size in DT
- Add DT node flag to determine if stage1 is enabled
Change-Id: I38b0ee3d5c4bf533f91077ee69bd464dfdd358c8
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Currently L1/L1SS are disabled for 11AD devices due to long exit time
of 11AD device from deep sleep.
11AD FW flows were optimized to shorten the exit latency, hence
L1 can be enabled before 11AD FW is loaded as part of the 11AD
reset flow.
Change-Id: Ibe12b1a18b87fab841823057a72cdd42d865ba6b
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Added basic support for CPU boost: when driver calls ops_bus_request
with a high bandwidth requirement, enable the big CPU cluster
and adjust the affinity of the wil6210 interrupt to run on
the first big core. The first big core is selected because
WLAN driver uses the other cores.
Change-Id: Ia752b9a8ca343b56e2839a30a4fdb59231f9a634
CRs-Fixed: 1114406
Signed-off-by: Lior David <liord@codeaurora.org>
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Option added not to bypass SMMU and use
fastmap DMA APIs for 11ad use-cases.
SMMU address range is changed to have the
max possible.
Change-Id: I073ab59cc4ef1b71545a9e77b76d94f09d659aac
CRs-Fixed: 1105323
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
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Enabling L1 / L1SS for 11ad device causes PCIe
link down or PCIe NOC read/write timeouts.
To prevent that, disable L1 for 11ad devices after
PCIe enumeration and resume.
Change-Id: I5061c95855d462879c2f5237ded80131de4d215d
Signed-off-by: Maya Erez <merez@codeaurora.org>
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The DOMAIN_ATTR_COHERENT_HTW_DISABLE IOMMU domain attribute is being
removed. SMMU coherency will be configured through the SMMU device tree
nodes moving forward. Remove the obsolete option.
Change-Id: I363e1c13314027ef0708c08b5080c46b16cd4508
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
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wil6210 FW needs to control rf_clk3 in order
to allow the host to disable it.
Keep rf_clk3 always on, as the current FW code
doesn't support handling of rf_clk3.
Change-Id: I552094c64bd9fb360ddd73022fe21a403c245b2f
CRs-Fixed: 986130
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Set DOMAIN_ATTR_S1_BYPASS SMMU attribute to put
stage 1 context bank in bypass, as an initial
configuration.
Stage-1 will be enabled in a later stage.
CRs-Fixed: 1001858
Change-Id: I5a320a605622fab85373d02fdbc6c206ddc514aa
Signed-off-by: Maya Erez <merez@codeaurora.org>
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On platforms where the power supply for 11AD is external
the wil6210 device can control the rfclk3 clock using a GPIO.
wil6210 driver has to enable the clock during device reset
to guarantee the rfclk3 is on for bootloader activity.
After the wil6210 device is up, the wil6210 driver needs to
leave only the pin clock enabled, to allow the device to
toggle it.
Change-Id: I0f6181d18268f7a2f615155525fbed0f0fe7572a
CRs-Fixed: 986130
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Add the ability to notify the platform driver on different
events, such as FW crash, pre reset and FW ready.
Change-Id: I796b06fae4376cda792d7f26a430ad4580899846
CRs-Fixed: 986135
Signed-off-by: Maya Erez <merez@codeaurora.org>
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On platforms where the power supply for 11AD is external
the wil6210 driver has to vote for the VDD and VDDIO regulators.
This patch adds such voting and guarantees the required
voltage for each regulator.
Change-Id: I472fe6b0600557bc4e623a3dd1b6352fd4a86e27
[merez@codeaurora.org: using regulator_set_load]
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Add 11ad as a subsystem (WIGIG) within the subsystem_restart
framework, in order to allow proper support for recovery from
11ad firmware crashes, and support automated collection of
crash dumps for offline analysis and bug reporting.
Change-Id: I7acbe8860e046cdba2ce027f91ed2fa995a70c70
Signed-off-by: Lior David <liord@codeaurora.org>
[merez@codeaurora.org: fixed merge conflicts]
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Some platforms don't support the wigig_en GPIO.
Changing wigig_en to be an optional property allows
removing the redundant setting of this GPIO in platforms
that do not support it.
Change-Id: Iad33d3876c1657cc4cc6b779b11d1c634f58a243
Signed-off-by: Maya Erez <merez@codeaurora.org>
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msm root-complex does not maintain parent/child relationship
with PCIe devices. Due to this, suspend operation may be carried
out asynchronously between PCIe device and root-complex.
In cases where 11ad refuses to suspend for any reason, the
root-complex connected to it may get suspended in parallel,
causing inconsistency between root-complex and 11ad device.
Disabling async suspend ensures proper ordering of suspend
between PCIe device and root-complex.
Change-Id: I42749d6af229721dc420b55b91e78bf58923d67f
CRs-Fixed: 933571
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Sleep clock may be used by 11ad chip to support
low power modes.
Change-Id: I00c9c5f3d24fa47463f5d0fe4aecc97ab09334b9
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
[merez@codeaurora.org: fixed merge conflicts]
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Config space was not properly restored when
resuming from suspend.
Change-Id: I6b9188f3989957eb44c93302d7958d422bb29e81
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Align msm_11ad driver with commit:
5d186c1a1f152c480b51772764d53f66c2a657ca - arm64: dma-mapping:
remove order parameter from arm_iommu_create_mapping()
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Set DOMAIN_ATTR_ATOMIC attribute to SMMU driver so that
it can handle DMA map/unmap operations from atomic context
which is required by 11ad driver
Change-Id: I7e538e6c41e5f40ff01dcfc9cbecf860ded22057
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Larger delay is required when using perf build
Change-Id: I1f24aa181e0f6982ec637a24a0ae543e87b500cc
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Delay is required to wait for the PCIe endpoint to become
stable after power on before de-assertion of PERST to
the endpoint by PCIe root complex.
Change-Id: Ib064e936fa0540646e6751d7c3b739c0beb48e60
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Failure of memory allocation for context was
not properly checked. Added proper check against
valid context value in relevant locations.
Change-Id: Ia74ddfb3c54e2781957e695a831c30f1356fed08
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
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Platform driver used to handle msm specific platform
requirement for 11ad chipset connected to msm platform
Takes care of platform support like:
- power switch through dedicated GPIO
- bus frequency voting
- SMMU attachment
Change-Id: I09c54ea747a5b4e0688b1b7d96e83ef134bb4215
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
[merez@codeaurora.org: fix merge conflicts]
Signed-off-by: Maya Erez <merez@codeaurora.org>
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