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* | | | mmc: cmdq_hci: Notify sdhci for enhanced strobeRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide cmdq_host ops of enhanced strobe to notify sdhci on enabling/disabling cmdq. This is needed because of following: Before running CMDQ transfers in HS400 Enhanced Strobe mode, SW should write 3 to HC_VENDOR_SPECIFIC_FUNC3.CMDEN_HS400_INPUT_MASK_CNT register. Default reset value of this register is 2. Change-Id: I36ead91ca8c9aeed967f120f8bdc3d2180af7746 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: cmdq: Set the timeout before unhaltAsutosh Das2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After halting CQE, if other commands are sent in legacy mode, the timeout would be modified as per the requirements of the command. Upon unhalting, this timeout would still persist for CQE too, which in some cases may lead to timeout. Hence, change the timeout to 0xf i.e. max during unhalt. Change-Id: Ifb0a1f4b9508c5884d381401216ae6c1373bb7de Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
* | | | mmc: core: add runtime PM voting to devfreq contextTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds usage for runtime PM for devfreq context. In case clock scaling is done from devfreq context its best to vote for runtime PM to avoid race between scaling and PM. Change-Id: I6fc7e2236b44b1f3a322da36552a7f9237c4dac6 Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: core: avoid returning error value for clk-scalingTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change removes the error value (-EAGAIN) that is returned in case of invalid state for clock scaling. Invalid state for clock scaling doesn't mean its an error, it merely means that at the current time we won't scale. Devfreq will invoke scaling in next interval. Change-Id: Idbd785da83e6ed00ede2b1b09529f7c81714ccf8 Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: sdhci-msm: enable clock scaling capabilityTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change enables clock scaling capability for sdhci-msm platform driver. Change-Id: Ia78eb0416321755737438d28984ddabea6dbd527 Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: core: disable clock scaling before system suspendTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change disables clock scaling in PM notification for "prepare for system suspend". This is needed because devfreq creates a dependency between it and mmc which causes an issue for system suspend. In this change we break this dependency in earlier stage. Change-Id: I86dad94c77607b4e8f8fa67035323716f5eb197d Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: sdhci-msm: skip eMMC slot probe if eMMC isn't a bootdeviceSubhash Jadavani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If eMMC is not a primary bootdevice, there isn't any point of probing eMMC device hence disable the probing in such case. Change-Id: I92fa8c2ef373fd8a9140dbfb41356684aaa28e4e Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: sd: Error out on bus speed switch failureVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Treat bus speed switch failures as error and don't fall back on default speed. The card status could indicate that the current function is busy and cannot be switched. Attempt to reinit the bus speed switch again instead of falling back to default speed. Silently falling back to lower speed could cause performance issues. CRs-Fixed: 849567 Change-Id: I4fcd51b82e41746620a68a0a0eb5a18d630ccbea Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | Revert "mmc: sdhci-msm: enable clock scaling capability"Venkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 9cc95fde7c2c ("mmc: sdhci-msm: enable clock scaling capability"). Clock scaling is breaking XO shutdown, keep the clock scaling disabled till that issue is addressed. Change-Id: Id4c530f8e2a8f565f9b957f46e5086078f808c96 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: core: Update PON based on the system stateKrishna Konda2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per eMMC specification, the PON (Power Off Notification) must be sent by host to the card before turning off the power. This will allow card to prepare itself for the power off and may even reduce the initialization of eMMC upon next boot-up. Send long PON during system power off and send short PON during system reboot to reduce the reboot latency. Change-Id: If4188b8b80aaa0e6c4e00e1807aa9589d5e7efdb Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Krishna Konda <kkonda@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: core: add support for bkops during cmdqDov Levenglick2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for handling both manual and auto bkops when command queuing is running. Change-Id: Ib967ca3c0420f4e54b3e93c497eb538d7347199a Signed-off-by: Dov Levenglick <dovl@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: core: expose info about enhanced rpmb supportKrishna Konda2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following eMMC JEDEC JESD84-B51 standard, an ehannced form of rpmb is supported. What this enhanced mode supports is in addition to be able to write one rpmb or two rpmb frames at a time, 32 frames can be written at a time. Expose this information present in ext csd field so that the user space application that wants to make use of this can do so. Change-Id: I53fd962fd7e04b5d2d7804c289d7865c2c5618d5 Signed-off-by: Krishna Konda <kkonda@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: block: fix dump cmdq registers on request timeoutKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timeout handler executed on softirq context. cmdq dumpstate() api resumes platform device and it can't be executed on softirq context. Request completion callback schedules error handler work in case of timeout error. This change moves CQE registers dump to the error handler callback. Change-Id: Iea26ca5240f6031218dcf374cafcf2708df1f125 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: sd: fix crash with sd cardDov Levenglick2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change ID I1333e1d4330393e446ba48a9474c83295744c050 added a call to the bus specific runtime_idle callback. This callback is only implemented for mmc thereby causing a crash when other types of memory (e.g. sd card) are used. This patch only calls the callback if it is implemented. Change-Id: Ie26b1b52fdcc0f4d5e3638801e28e965fae0cbeb Signed-off-by: Dov Levenglick <dovl@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: core: fix bkops init for cmdqDov Levenglick2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is needed to initialize auto bkops before enabling command queueing since the initialization uses CMD6 which may not be called when cmdq is enabled. Change-Id: Idecff761754fe394c01425e7fd4dd5f6a083135d Signed-off-by: Dov Levenglick <dovl@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: sdhci-msm: avoid using NOP ADMA descriptor for EOTTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qualcomm SDCC doesn't need NOP descriptor for End of transfer (EOT). This change insure that no NOP descriptor will be sent in order to notify EOT, instead, the EOT will be marked for the last descriptor. Change-Id: Ia670bc901af2196a415c2aa54357704949a7b112 Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: sdhci: cmdq: add notification for cmdq haltTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During halted CMDQ mode, HW expects descriptors sizes same as used in CMDQ mode. Our SW uses the legacy path (SDHCI) in case CMDQ is halted, thus, we need to update legacy path of the fact that we are in Halted CMDQ state so it can adjust the descriptors size accordingly. This change adds a notification mechanism for that purpose. Change-Id: Iabb473696fb11827dfcce9b137c26b2c5a5a879d Signed-off-by: Talel Shenhar <tatias@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts & compilation errors] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: cmdq: add clock scaling for CMDQ modeTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds clock scaling ability to command-queueing mode, it does so by adding next logic: * Statistics collection for CMDQ data path * Empty the queue and Halt it before frequency change * Scale from data path in case host claiming is not possible Change-Id: I53a323b55df4d7c27e3ee3426ee4e856e533522c Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: core: Add MMC BKOPS statistics and debugfs ability to print themDov Levenglick2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BKOPS statistics are used for BKOPS unit tests and APT tests to determine test success or failure. The BKOPS statstics provide the following information: The number of times BKOPS were issued according to its severity level The number of times manual BKOPS was started/stopped (HPI) The number of times auto BKOPS was enabled/disabled In order to enable and reset the statistics: echo 1 > /sys/kernel/debug/mmc0/mmc0:0001/bkops_stats In order to disable the statistics: echo 0 > /sys/kernel/debug/mmc0/mmc0:0001/bkops_stats In order to view the statistics: cat /sys/kernel/debug/mmc0/mmc0:0001/bkops_stats Change-Id: Ib84319aedfb49dc022bc27efbda842a5db38c7e9 Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Signed-off-by: Dov Levenglick <dovl@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: core: ignore cmdq halt failure when no change is neededKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During system suspend CQE halted by queue suspend even before mmc host suspend. When mmc host suspend calls halt helper, CQE is already halted. This change ignores error value of halt helper. Change-Id: I2d1456333f1d04f0e7a77485443b80a0ccaa3b4e Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: sdhci-msm: Fix compatible list terminationVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Compatible list should be terminated with NULL entry, fix it. Change-Id: Id9be4fa95fd1cbbbe28a3c63b63bbd6c8c29fa85 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: add support for bkopsDov Levenglick2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for manual and auto bkops for legacy (not command-queue) mode. Change-Id: I1333e1d4330393e446ba48a9474c83295744c050 Signed-off-by: Dov Levenglick <dovl@codeaurora.org> [subhashj@codeaurora.org: fixed merge conflicts and compilation errors] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: clk-scaling: change locking from irq_save to bhTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit changes the spinlock used by clock scaling logic to use the bh flavor instead of irqsave. This is done in order to avoid the unnecessary irq disable while going into clock scaling critical sections. Change-Id: Id660db89dc531336621f40908fd3a4ad4777a12d Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: Fix clock scaling for HS400 with enhanced strobeVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Much of the sequence to scale up to HS400 is not required when enhanced strobe mode for HS400 is supported. Handle scale up to HS400 appropriately in this case. Change-Id: I733f98bdb99e54d6cd3a074fcece2c89aaaee12f Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: sdhci-msm: Add hs400 enhanced strobe mode support to hostRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds hs400 enhanced strobe mode(emmc 5.1 feature) support to sdhci-msm platform host. Change-Id: Id35e0b9e47ea725202c8e4a3ca479d52cc872920 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: sdhci: Add hs400 enhanced strobe mode support to hostRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds hs400 enhanced strobe mode(emmc 5.1 feature) support to sdhci host. Change-Id: Ib65905fa263553842cd55f38edccc135cac4bcf9 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: Fix bus width setting in enhanced strobe modeVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 8-bit bus width needs to be set first before switching to DDR bus width when entering HS400 in enhanced strobe mode. Also use the mmc_select_bus_width() for doing this instead of rewriting portion of that code. Change-Id: If9bec799de77714d7183c812a0ba04a9a4ac48f5 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: Add host ops for enhanced strobeVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some hosts may need additional steps to get HS400 functional in enhanced strobe mode. Add host ops to facilitate that. Change-Id: I9663830e7ccedf8bf7970d0724a4c7ce212073fd Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: enable Enhance Strobe for HS400Yi Sun2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhance Strobe is defined in v5.1 eMMC spec. This commit is to implement it. Normal Strobe signal for HS400 is only provided during Data Out and CRC Response. While Enhance Strobe is enabled, Strobe signal is provided during Data Out, CRC Response and CMD Response. While enabling Enhance Strobe, the initialization of HS400 does not need enabling HS200 and executing tuning anymore. This simplifies the HS400 initialization process much. Per spec, there is a STROBE_SUPPORT added in EXT_CSD register to indicate that card supports Enhance Strobe or not. If it is supported, host can enable this feature by enabling the most significant bit of BUS_WIDTH before set HS_TIMING to HS400. Change-Id: I1003352cb31dfaec01fde352da7b879a13c94b3f Signed-off-by: Yi Sun <yi.y.sun@intel.com> [venkatg@codeaurora.org: Fix minor conflicts & compilation failure] Patch-mainline: linux-mmc @ 06/04/15, 19:50 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: sdhci-msm: Reset vendor specific func register on probeVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vendor specific func register doesn't get reset when using the software reset register. The various bootloader's could leave this in an unknown state, hence reset this register to it's power on reset value during probe. Change-Id: I3258eedf87b1bc945f43b85627948e6c92b74686 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: core: Add clock hold and release pair for cmdq_opsTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mmc_host_clk_hold/release pair should be added for relevant cmdq_ops. Since it enables host->clock which is needed for register access as well (apart from MCLK). Change-Id: I6d9d15a421225c5b4179cb19e467a17d01ad176f Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: sdhci-msm: fix tracepoint for pm debuggingKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tracepoint measures time that takes runtime suspend, suspending crypto engine time included into measurement. Change-Id: I6108a9dc5b188e2086aa5e6d2fe87414bb2a2539 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: block: add card device reference counting for CQ modeKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since error handling could race with runtime suspend, increase usage_count for the card device will prevent this race. Change-Id: Ie95a3c631f519c7993b0032f0b674871b64e4cb6 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: queue: Fix pull new requests condition, when in cmdq modeKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are three cases, request should not be pulled from the queue: - it is dcmd request, while dcmd request is in progress - the CQE is halted, but not because of the runtime suspend - the cmdq is in error state When the card is suspended, the CQE is halted. New request coming should be pulled from the request queue and the runtime resume will be triggered by mmc_get_card(). There is no race between the pulling request condition and the runtime suspend flow, because the card marked as suspended after the CQE is halted. Change-Id: I126ae689f7fea2e7545dfda7c4c6abda286a0f11 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: sdhci: add post halt helper to support command queue hostsKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After halting the CQE, an unexpected legacy irq may be received by the controller. The post halt helper function acknowledges this irq and handles it. Change-Id: Iaaa4e57fba830d626fad693ff33dd966994bc50f Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: core: halt CQE before suspend and un-halt CQE on resumeKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To execute legacy SDHCi suspend/resume flow, CQE should be halted, because suspend flow uses legacy SDHCi commands (cmd6 flush and cmd5 sleep) commands. On resume, there is full card initialization and both the card and the controller will be in CQ mode after resume. Still need to update CQE state by cleaning halt bit. This change implemented in helpers, that are used by both system and runtime suspend/resume callbacks. Change-Id: I2ae9b19e2cbde04366e7ecf06377a5efd81e3f26 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: cmdq: add platform device reference counting for runtime pmKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Access to the registers of CQE HCI wrapped by increment/decrement of pm core usage counter for the platform device. Change-Id: I9da4aa7d28dbf8e1d2bf62f6d5fa0875bd5b6064 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: cmdq-host: add post halt helper after halt ack interruptKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After the CQE halt on some controllers need additional actions, before wakeup of waiting thread. Change-Id: I742baa48eb3f6eccf782d77a03aafe16ab7188f1 Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: cmdq: configure task descriptor list base register on enableKonstantin Dorfman2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When enabling cmdq mode for the first time, need to allocate descriptors table. After controller reset and enabling cmdq next time, still need to update CQTDLBA and CQTDLBAU registers with already allocated descriptors table (desc_dma_base). Change-Id: Ide89eebbce5a193cd44a1ea4ec65403f98e2a7ab Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
* | | | mmc: block: Add cache barrier supportSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eMMC cache barrier provides a way to perform delayed and in-order flushing of cached data. Host can use this to avoid flushing delays but still maintain the order between the data requests in cache. In case the device gets more barrier requests than it supports, then a barrier request is treated as a normal flush request in the device. If the eMMC cache flushing policy is set to 1, then the device inherently flushes all the cached requests in FIFO order. For such devices, as per spec, it is redundant to send any barrier requests to the device. This may add unnecessary overhead to both host and the device. So make sure to not send barrier requests in such cases. Change-Id: Ia7af316800a6895942d3cabcd64600d56fab25a6 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: Enable clock gating for cmdqRitesh Harjani2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable clock gating for cmdq by adding respective API to clk hold/release. CMDQ also uses the same legacy clock gating API. Change-Id: I3d4f28cedb24ff2292ab08bdd7470358cf134dd5 Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
* | | | mmc: host: Reorder MMC_SDHCI_MSM_ICE configVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMC_SDHCI_MSM_ICE is enabled only if MMC_SDHCI_MSM config is enabled. Reorder this so that it shows up appropriately in the kernel config menu. Change-Id: Ic6af2979e7c8c56841d509f3f25fadd4dd2fe9d2 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: sdhci-msm: Free pltfm_host on probe deferVenkat Gopalakrishnan2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The platform host has been initialized and should be freed in case we defer the probe. Change-Id: Iadce572fa4618b18f2fadf9e00812e75144af1c9 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
* | | | mmc: block: support RPMB with CMDQ frameworkSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CMDQ is not supported for RPMB partition. Hence, for RPMB requests the controller is kept in HALT state and then CMDQ is disabled in the card. Change-Id: I1242841d5fa063b542e35dcff95694ef5e88737a Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: block: add discard and secdiscard support for CMDQ modeSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Discard is supported in CMDQ mode only when device queue is empty. Hence, discard commands should be sent using DCMD slot with QBR (Queue Barrier) flag set. Change-Id: I630091cbd94ffcdcec71626257f912c15fd2e21e Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* | | | mmc: cmdq_hci: Add DCMD response to mrqSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will be needed by core layers to check the status for CMD13 that is sent in CMDQ mode. Change-Id: If3d062bad4cf87c2543e6d5345f9ab6a0afa23bf Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: sdhci-msm: enable clock scaling capabilityTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change enables clock scaling capability for sdhci-msm platform driver. Change-Id: I9582bbb4b37594d4d59a7398a00656846516d675 Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: sd: add support for UHS card to get max frequencyTalel Shenhar2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds UHS cards to mmc_sd_get_max_clock() API. Cards that support UHS can set timing of SDR104 which supports frequency up to 208Mhz. Change-Id: I25bcb35aa2cecd98f6f04cd98a616a76c75b6784 Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
* | | | mmc: cmdq_hci: Add Inline Crypto Engine (ICE) supportSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add changes to configure ICE for data encryption/decryption using CMDQ. Change-Id: I9a10d18d617102916526e994e9f9d22d2aa5446b Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | mmc: cmdq_hci: Fix timing and response type for busy commandsSahitya Tummala2016-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The response type and command timing for busy commands are set incorrectly due to wrong cmd->flags check. Correct this to check for MMC_RSP_BUSY flag. Change-Id: I4498c302914a81bf19f61d20b30bd4426e21d3d0 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-22 18:37:19 +0000