| Commit message (Collapse) | Author | Age |
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Fix a build breakage where MMC is enabled, but BLOCK is not.
Change-Id: I0eb422d12264f0371f3368ae7c37342ef9efabaa
Signed-off-by: Mohan Srinivasan <srmohan@google.com>
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Conflicts:
kernel/cpuset.c
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commit 260b31643691e8a58683a4ccc3bdf7abfd86f54a upstream.
The dw_mmc driver stores the physical address of the MMIO registers
in a pointer, which requires the use of type casts, and is actually
broken if anyone ever has this device on a 32-bit SoC in registers
above 4GB. Gcc warns about this possibility when the driver is built
with ARM LPAE enabled:
mmc/host/dw_mmc.c: In function 'dw_mci_edmac_start_dma':
mmc/host/dw_mmc.c:702:17: warning: cast from pointer to integer of different size
cfg.dst_addr = (dma_addr_t)(host->phy_regs + fifo_offset);
^
mmc/host/dw_mmc-pltfm.c: In function 'dw_mci_pltfm_register':
mmc/host/dw_mmc-pltfm.c:63:19: warning: cast to pointer from integer of different size
host->phy_regs = (void *)(regs->start);
This changes the code to use resource_size_t, which gets rid of the
warning, the bug and the useless casts.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Timeout errors can occur because of execution error in device during
execution of last command. For errors encountered while executing
commands in card, like cmd46 or 47, the card will stop execution and
wait for the next command from controller to return error information.
If controller sends no command, then a timeout error will occur. To
retrieve the error information in card, send status command must be
sent. In case a non-timeout error like RED error is detected, there
is no need to send CMD13 to card as the error information is already
present in the Resp Arg register.
Change-Id: I6ac0d3db834a3d5a6c67ee08d6232240c35714ff
Signed-off-by: Vijay Viswanath <vviswana@codeaurora.org>
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Enable the legacy interrupts immediately after halt interrupt is
handled, from cmdq_irq() itself.
When cmdq halt is initiated, as per existing logic driver waits either
for halt interrupt to fire or for certain period of time. In case if
cmdq is halted but halt interrupt got delayed than wait-timeout period,
driver disables cmdq interrupts since cmdq is in halt state.
The delayed halt interrupt gets fired only when cmdq is unhalted next
time and cmdq interrupts are enabled. And this delayed interrupt is
treated as an unexpected interrupt.
By enabling legacy interrupts (i.e., disabling cmdq interrupts) from
cmdq_irq(), we can ensure that we don't disable cmdq interrupts until
halt interrupt get fired. So we can avoid above mentioned scenario.
Change-Id: Ic052d41fac789b6390a5d80dfaee91767bdb783f
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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When system is heavily loaded, in some cases interrupt servicing
is getting effected and cmdq halt interrupt handler is getting invoked
after 1 sec delay. Since wait time of HAC interrupt in cmdq driver
is 1 sec, the delayed interrupt is being treated as unexpected
interrupt.
For fixing this case, increasing the timeout to 10 seconds.
Change-Id: I55879095aa2b81a10f40963aee02b2068a3305b4
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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For SDHC version 5.0 onwards, ICE3.0 specific
registers are added in CQ register space, due to
which few CQ registers(like CQ_VENDOR_GFG,
CQ_CMD_DBG_RAM) are shifted. This change is to
update CQ register offset for sdm660.
Change-Id: Ie85b8f6c68511dccd2b545bd9cc17c747f3da8e7
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
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During error scenario, if interrupt status of CQ controller is cleared
before halting the controller, the CQ controller can send commands to
card in the time delay between clearing of interrupt and halting. The
response of card to these commands can overwrite the error information
stored in Response Arg register. So, if an error is detected, the CQ
must be halted first and then the interrupt must be cleared.
Change-Id: Ief7039226b01b50fc71cf17a4eb625afd8c9bd06
Signed-off-by: Vijay Viswanath <vviswana@codeaurora.org>
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Due to deferred resume enabled ->
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in system suspend
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dpm_prepare
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mmc_pm_notify with PREPARE_SUSPEND
This will return from here and will not wait
for mmc_rescan to complete.
Because of above system has deadlocked in which =>
mmc_rescan after acquiring device's mutex_lock, has
scheduled a work on WQ_FREEZABLE(bdi_wq) which will not run
since system freeze state has already completed.
This will only complete once tasks are unfreezed
which means only after system resume is completed.
And system suspend, is unpreparing the devices from dpm_prepared_list.
During which this process is trying to acquire card->device's mutex lock
which is held by above process. Thus a deadlock.
Change-Id: I926bb3783e62892ce842e5d4da44a3c24c8f244d
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
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Currently there is one rare case where suspend thread trying
to suspend sdhci-msm waits infinitely for pwr_irq interrupt
from hardware which never gets raised and thus watchdog barks
happens.
Change this waiting to wait_for_completion_timeout.
Change-Id: Ic4e9bca91b5496409b4afe2be2892c83aa390e95
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
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In CQ mode, the legacy commands will be sent after CQ is
put in halt state. But when deferred resume is enabled,
the resume happens in mmc_wait_for_req(), which will enable
CQ again overiding the caller's state. This causes legacy
commands to fail. Fix this by moving the deferred resume
from all the places to mmc_get_card() which is always the
first step done in both CQ/legacy commands and thus avoids
the above issue scneario.
Change-Id: I432e89f3221615dd644412f481d17f840c75e407
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
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This provides module/cmdline parameter for disabling cmdq.
This may be required sometimes for testing cmdq v/s non-cmdq
mode for performance or other stability testing.
Pass cmdline parameter as (sdhci-msm.nocmdq=1) for disabling
cmdq via cmdline.
Change-Id: Ic0993a58d79f9c9b92daa7a581a5bce9ea24ed03
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
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SDHC v5.0 onwards, SDHC includes the inline interface for
cryptographic operations which is ICE HCI.
This patch includes the driver changes for supporting crypto
operations with ICE HCI in noncq mode.
Change-Id: I3253b796212f63853cb3f6cf130f0a8542595428
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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On SDHC v5.0 onwards, SDHC includes the inline interface
for cryptographic operations which is ICE HCI.
This patch includes the driver changes for supporting crypto
operations with ICE HCI in cmdq mode.
Change-Id: I618a0a4b7356f2f19c31d67fca1664daa51b09f9
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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Add new sdhci host_op for updating ice configuration while sending
request through cmdq. Adding provision for supporting the ice
context configuration for ICE HCI.
Change-Id: I0e7299cfb1064c117aa94fb2416cc5cc4f1ec5f6
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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Factor out the logic of getting ice config parameters from
sdhci_msm_ice_cfg().
With ICE2.0, same sdhci_msm_ice_cfg function is being called from cmdq
and noncq. But with ICE3.0 support, cmdq needs a separate host op.
Since this logic of getting ice config is common for noncq and cmdq,
by having it in separate function, same can be reused
in cmdq host op as-well.
Change-Id: If2cf26667acd54cb7ee7bd6283d8f24fcbf60791
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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Factor out the logic of updating the SDHC ICE config registers
from sdhci_msm_ice_cfg().
For ICE3.0, different set of SDHC ICE registers are need to be updated.
So having this logic in separate functions, we can have logical
separation for ICE2.0 and ICE3.0.
Change-Id: Ib3d3f9701875000985dc9382bdcdf5fb0e872a43
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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SDHC v5.0 onwards the ICE reset register offset got updated.
Update the register offset based on the SDHC version.
Change-Id: I9c1250460cddf72837446b54fe03e3c52f11b234
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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Check if the SDHC has ICE HCI support. If support is present,
enable the cryptoghrapic support inside SDHC.
Also ensure that it is re-enabled after SDHC is reset.
By default ICE HCI is disabled.
Change-Id: I43a65279088d70b415c396bc3e51e0e510bb7f9c
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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Generally, during card suspend we call mmc_power_off
and disable controller clocks.
Now consider below sequence of events :
suspend -> resume -> suspend.
1) During first platform suspend, mmc_power_off will
be called and clocks would be disabled.
2) As a part of platform resume, we enable controller
clocks and defer card resume when
MMC_BUSRESUME_NEEDS_RESUME flag is set.
3) During next suspend we check if card is already
suspended (i.e MMC_BUSRESUME_NEEDS_RESUME is set)
and return without doing actual suspend (where we
call mmc_power_off and disable controller clocks).
So in this scenario, controller clocks will remain ON
even though card state is SUSPENDED.
Fix this by disabling controller clocks during suspend
if controller clock was ON.
CRs-Fixed: 1088893
Change-Id: Id54a15d7f6a7131dab609eec1db158c64ada83ce
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
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It is preferred to use blk_cleanup_queue() instead of
blk_stop_queue() during reboot/shutdown due to these reasons -
1. blk_cleanup_queue() marks the queue as dying/dead which prevents
the new requests from getting inserted into the queue after MMC
driver shutdown.
If we just use blk_stop_queue(), the requests are still allowed into the
request_queue but are not dispatched to the low level MMC driver as the
queue is marked as stopped. This may result into deadlock/hang issue during
shutdown, if FS (as part of emergency remount) is waiting for the queued
request to be completed without relinquishing the CPU. If some CPU bound
workqueues related to shutdown are pending on that CPU, then shutdown
may hang.
2. blk_cleanup_queue() also drains the queue completely by processing
all the pending requests from the elevator queue even though those are
not yet dispatched to request_queue and also waits for the completion
of all those requests.
Also, do not override the queue_lock in request_queue structure with
md->lock as this will cause below problem when using blk_cleanup_queue() in
shutdown. This happens because blk_cleanup_queue() changes queue_lock
from driver md->lock to it's original request_queue lock.
Callstack:
<6> BUG: spinlock already unlocked on CPU#6, iozone/4391
<6> lock: 0xffffffc06ab8be80, .magic: dead4ead,
.owner: <none>/-1, .owner_cpu: -1
[ffffffc0420e3b28] __delay at ffffffc00031a328
[ffffffc0420e3b38] __const_udelay at ffffffc00031a304
[ffffffc0420e3b58] msm_trigger_wdog_bite at ffffffc0004476cc
[ffffffc0420e3b68] spin_bug at ffffffc0000e4554
[ffffffc0420e3b98] do_raw_spin_unlock at ffffffc0000e47a0
[ffffffc0420e3bc8] _raw_spin_unlock_irq at ffffffc000db3ee0
[ffffffc0420e3be8] blk_queue_bio at ffffffc0002ff1e4
[ffffffc0420e3bf8] generic_make_request at ffffffc0002fd210
[ffffffc0420e3c58] submit_bio at ffffffc0002fd328
[ffffffc0420e3ca8] submit_bio_wait at ffffffc0002f5768
[ffffffc0420e3d00] compat_sys_call_table at ffffffc00008e000
[ffffffc0420e3d18] submit_bio_wait at ffffffc0002f574c
[ffffffc0420e3d38] __blkdev_issue_flush at ffffffc00030043c
[ffffffc0420e3da8] blkdev_issue_flush at ffffffc000300494
[ffffffc0420e3dd8] ext4_sync_fs at ffffffc0002597a4
Change-Id: Iaa26944ccc6c279390215869f5003156400840ed
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
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Add sysfs entry to print MMC ring buffer events.
usage: cat /sys/kernel/debug/mmc0/ring_buffer
Change-Id: I1fb6b0f65a11cd574e56df9937a96acd74a84341
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
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Add ring buffer tracing events in CQ for
debugging purpose. Tracing events includes
cpu, timestamp, CQ metadata per tag(task
descripter, tag, CQIS ,halt-unhalt,
enable-disable).
Example:
<6> 1211721243963: cmdq_request : tag: 0
<6> 1211721856723: cmdq_irq: mmc0: CQIS: 0x2 err: 0
<6> 1211721863286: cmdq_irq: mmc0: completing tag -> 0
<6> 1211722496046: cmdq_prep_dcmd_desc: mmc0: DCMD:
Task: 0x0163402f | Args: 0x015f2538
<6> 1211722505994: cmdq_request : tag: 31
<6> 1211722538025: cmdq_irq: mmc0: CQIS: 0x2 err: 0
<6> 1211722544588: cmdq_irq: mmc0: completing tag -> 31
Change-Id: I7642bfc33513fa6b09da03220fd4dd12f47bbac5
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
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Add mmc tracing events in suspend and resume.
Change-Id: I5ca1c3f667003c4b4224b65d2a5db50766b44d75
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
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Add ring buffer tracing events in legacy mode for
debug purpose.
Tracing events include cpu, timestamp, legacy command
opcode, argument, response, interrupts.
Example:
<5> 171912889412: sdhci_prepare_data: mmc0: 0x28=0x0000003c
0x3E=0x00000000
<5> 171912901235: sdhci_set_transfer_mode: mmc0: 0x00=0x00000000
<5> 171912908579: sdhci_send_command: mmc0: updated
0x8=0x00000000 0xC=0x00000013 0xE=0x0000083a
<5> 171912920922: sdhci_irq: mmc0: resp 0: 0x00000900
resp 1: 0x00000000 resp 2: 0x00000000 resp 3: 0x00000000
<5> 171912931339: sdhci_irq: mmc0: intmask: 0x1
<5> 171912938839: sdhci_irq: mmc0: intmask: 0x2
<5> 171912945766: sdhci_finish_data: mmc0: 0x24=0x01f80000
Change-Id: I26d2de3ddf72a74dd84199a9772d48da128796f4
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
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Add ring buffer to enable tracing of significant events
of eMMC in both CQ and Legacy mode for debug purpose.
CONFIG_MMC_RING_BUFFER should be enabled to use ring
buffer logging.
Change-Id: Iceb404d77fca19e133c319bc66ec15b2d77c7c54
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
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The config vop of the ice driver has been updated to config_start.
Updated the sdhci-ice driver to reflect this change.
Change-Id: I7c44cc5011c6a7c88b9acf9cb9d8e61ef3f8e33a
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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Enabling deferred resume feature on SDM660. With this feature
enabled, MMC devices won't be resumed as part of the system
resume. It will be resumed only when there's a request to be
processed.
Change-Id: I901a888269b8bc0de006c8174546fd5f5c30baa8
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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Do not send CMD13 after sending switch command for HS, HS_DDR,
HS200 and HS400 modes. It seems that below problem can occur -
1. After sending switch CMD6, card will switch to mentioned bus speed
mode.
2. At this moment the controller will be in different bus speed mode,
unless the timing of the controller is switched to match with that of
card.
During this time, if CMD13 follows CMD6 to switch the bus speed
mode in card. Then it may cause timeouts or other errors because
of mismatch in timing of controller and card.
Thus send CMD13 to see the status once both controller and card are
switched to same timings.
Change-Id: If796c8cfce2cbdc1bce460460e3276886ae1be0c
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
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While switching to HS mode, high speed mode timing should be selected
in the device before changing the clock frequency in the host.
But present driver first updates the frequency in host and then selects
HS mode in device while selecting HS400 mode. This is a spec violation.
Updated the sequence to comply with spec.
Change-Id: I5b2c1f724d820daf9c0bca8651cf85bd0ff67655
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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Sometimes after failing RPMB access due to card in bad voltgae state,
If issue USER parition access request,it fails as card is already in
bad state. Fix this by adding error handling to mmc_blk_part_switch()
and by resetting the block whenever partition switch fails.
Change-Id: I245683b0b0a06b13938036dbc37e87ed1ef70b89
Signed-off-by: Pavan Anamula <pavana@codeaurora.org>
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