summaryrefslogtreecommitdiff
path: root/drivers/clk (follow)
Commit message (Collapse)AuthorAge
...
| * | | | clk: qcom: Fix uninitialized variable and null pointer exceptionTaniya Das2017-01-25
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize the variables before their usage and add null pointer checks before dereferencing pointers. Change-Id: Ibe4140c6e0aa25c37583e6e5e6e2331d86f389aa Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | Merge "clk: Add separate function to print clocks enabled during suspend"Linux Build Service Account2017-01-28
|\ \ \ \
| * | | | clk: Add separate function to print clocks enabled during suspendTaniya Das2017-01-23
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When debug_suspend is set to true and the low power code invokes the function to print the enabled clocks during suspend the function fails to execute the do while loop in clock_debug_print_enabled_clocks, so separate out the function to handle the same. Change-Id: I014750637bc17c1107c7f0745d2d44caf6c96e62 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | Merge "clk: qcom: mdss: add support for MDSS DP PLL for SDM660"Linux Build Service Account2017-01-28
|\ \ \ \ | |/ / / |/| | |
| * | | clk: qcom: mdss: add support for MDSS DP PLL for SDM660Padmanabhan Komanduru2017-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Model and configure MDSS Display Port PLL for SDM660 target. Add changes to define and register DP VCO, divider and mux clocks as per common clock infrastructure. Change-Id: Ice83e21323087e81e2f30998260be85120e41fa8 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | | | Merge "clk: msm: clock-debug: acquire prepare lock during measurement"Linux Build Service Account2017-01-21
|\ \ \ \
| * | | | clk: msm: clock-debug: acquire prepare lock during measurementOsvaldo Banuelos2017-01-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the rate of the clock being measured changes at the same time clock_debug_measure_get() is called, there can be a miscalculation of the value of the divider between the measurement circuitry and clock output. Acquiring the prepare lock fixes the race since it prevents clock rate changes during measurement. CRs-Fixed: 1109789 Change-Id: I51050379a45a51c22109a06bc4758d767f361da1 Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
* | | | | Merge "clk: msm: Update the frequency table for csiphy clock on MSMCOBALT v2"Linux Build Service Account2017-01-19
|\ \ \ \ \
| * | | | | clk: msm: Update the frequency table for csiphy clock on MSMCOBALT v2Deepak Katragadda2017-01-19
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 274.29 MHz as a supported frequency for the csiphy_clk_src RCG on MSMCOBALT v2. Change-Id: I2eb5fc2cdce08c67f165be9094c88f454f0de4a1 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* / | | | clk: qcom: Move the rbcpr clock voltage vote to active onlyTaniya Das2017-01-19
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RBCPR client would not be able to remove it's vote during any low power state, so move the clock to vote on active only voltage. Change-Id: I859ad7eb5b4f604cd8785156a0354ed76d3622c0 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | Merge "clk: qcom: Add support for 19.2Mhz for USB30 utmi clock"Linux Build Service Account2017-01-18
|\ \ \ \
| * | | | clk: qcom: Add support for 19.2Mhz for USB30 utmi clockTaniya Das2017-01-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB client needs 19.2MHz frequency support for utmi clock, so that it could be requested for. Add support for the same. Change-Id: Icdbf9c5155bdd0ec02d357182d6e020c06a70648 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | | Merge "clk: qcom: Move prepare_enable of XO clock before spinlock"Linux Build Service Account2017-01-18
|\ \ \ \ \
| * | | | | clk: qcom: Move prepare_enable of XO clock before spinlockTaniya Das2017-01-18
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk_prepare would hold a mutex and as clk_debug_mux_measure_rate has already acquired a spinlock it would result in a BUG from sleeping context. Avoid this by moving the prepare_enable before acquiring spinlock. Change-Id: Ia405c884663ef80e87ae066df09f1c30134faf2e Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | | Merge "clk: qcom: Remove few graphics clock for sdm660"Linux Build Service Account2017-01-18
|\ \ \ \ \
| * | | | | clk: qcom: Remove few graphics clock for sdm660Taniya Das2017-01-18
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gcc_gpu_bimc_gfx_src_clk and gcc_gpu_snoc_dvm_gfx_clk need to left at their default state of ON. Remove controlling them from the linux clock driver to avoid disabling them during late_init. Change-Id: Iefc033998bf87fcc98dfaa1b7321d9cc33dedd5e Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | | clk: qcom: Add support for GPLL0 active clock for CPUTaniya Das2017-01-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU clocks would require to vote on active only instance of GPLL0, so add the clock and also update the parent names for the CPU clocks. Change-Id: Id8c7f76170a1cc94fe045b8ba975aaa42c4b3819 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | | clk: qcom: Add support for multiple PLL software instancesTaniya Das2017-01-17
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There could be use cases where the PLL could support various software instances for various peripherals or for cpu. In those cases PLL need to support aggregation logic for the voting and devoting on the PLL. Change-Id: Ie5148a75452dccc555989a454996b945956f94e5 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | Merge "clk: qcom: Add support to set rcg parent src for dp_pixel clock"Linux Build Service Account2017-01-16
|\ \ \ \
| * | | | clk: qcom: Add support to set rcg parent src for dp_pixel clockAmit Nischal2017-01-12
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | For set rate, dp_pixel_clk_src rcg requires the correct parent source to configured so add support for the same. Change-Id: I9c8ae2904b47dbe0bc6845e2ca38fbd2f126a7e5 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | | clk: qcom: Move prepare enable parent sources for FORCE_ENABLE_RCGRTaniya Das2017-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move preparing/unpreparing the clock source parents from the clk set rate. This is required as invoking prepare from clk enable with disable irqs and prepare would take a mutex resulting in sleeping from invalid context. Change-Id: I90d8a346f684747f635bd9e7254ceb8d45841b05 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | clk: qcom: Fix for rate request to RPM during handoffAmit Nischal2017-01-12
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | For all rpm clocks, max rate request is going to RPM during handoff which always shows max requested rate value from APSS so fix the same. Change-Id: I4f184ea053fc1a40830eb9f555c24fdf17ba3fa1 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | Merge "clk: qcom: Add support to register GPU rbcpr clocks"Linux Build Service Account2017-01-10
|\ \ \
| * | | clk: qcom: Add support to register GPU rbcpr clocksTaniya Das2017-01-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPU RBCPR clocks needs to registered separately, as GFX CPR would require the rbcpr clocks to register the regulator handle. Change-Id: I59def76e7dd69600be8faf47eb867a97ab04739e Signed-off-by: Amit Nischal <anischal@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | clk: qcom: Fix clocks which are required to be always onTaniya Das2017-01-10
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following are the changes made: 1. Add CLK_IGNORE_UNUSED flag for some clocks which are not supposed to be disabled at late_init_level. 2. Fix clock measure debug mux value for mmcc clocks. 3. Add mmss_mdss_byte1_intf_div_clk for mdp. 4. Fix usb ref clocks to branch voted. Change-Id: I06396c73f7855acfac283abe576e0b4cc1a92bd5 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | Merge "clk: msm: clock-gcc-8998: keep gcc_bimc_gfx_clk on"Linux Build Service Account2017-01-09
|\ \ \
| * | | clk: msm: clock-gcc-8998: keep gcc_bimc_gfx_clk onDavid Dai2017-01-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Keep gcc_bimc_gfx_clk always on to prevent a stall during BIMC redirection handshake that occurs as part of a transition between different CCI power modes. The stall causes momentary bandwidth drops for the display ports and creates display buffer underflows. Change-Id: Ie7de487fbe16c7e6b1234a96c1208d54daa5a9bb Signed-off-by: David Dai <daidavid1@codeaurora.org>
* | | | Merge "clk: msm: clock-osm: remove ioremaps from panic callback"Linux Build Service Account2017-01-09
|\ \ \ \
| * | | | clk: msm: clock-osm: remove ioremaps from panic callbackOsvaldo Banuelos2017-01-05
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling ioremap() in clk_osm_panic_callback() can result in BUG() when the kernel is panic-ing. It is not safe to use ioremap() in atomic context. Map the debug registers at probe time instead. CRs-Fixed: 1086427 Change-Id: Ie14be6ee9ffbcb09009d5d05235e20f6ac215fa0 Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
* / / / clk: qcom: osm: remove ioremaps from panic callbackTaniya Das2017-01-05
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling ioremap() in clk_osm_panic_callback() can result in BUG() when the kernel is panic-ing. It is not safe to use ioremap() in atomic context. Map the debug registers at probe time instead. Change-Id: I4009ea6e10df2dc8649cf0b0c1a5b6398d3c689e Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | clk: qcom: Remove mmssnoc_a_clk_cpu_vote clock instance for msm8996Amit Nischal2017-01-03
| | | | | | | | | | | | | | | | | | | | | | | | mmssnoc_a_clk_cpu_vote clock is not required on msm8996, so remove the clock instance for the same. Change-Id: Ibf1cbb9dc67c9255df09c32a67c320f8bb3ecbc7 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | clk: qcom: Add handoff support for smd-rpm and voter rpm clocksAmit Nischal2017-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some smd-rpm and voter rpm clocks are critical for system booting and should not be gated until a unused clock tree late_init level. So add support for handoff functionality for system critical rpm clocks by using CLK_ENABLE_HAND_OFF flag. Change-Id: I9f9674a25fc5f7a2bc9b5672b00716b82223b06b Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | Merge "clk: qcom: smd-rpm: Update the number of rpm clocks for sdm660"Linux Build Service Account2017-01-02
|\ \ \
| * | | clk: qcom: smd-rpm: Update the number of rpm clocks for sdm660Taniya Das2017-01-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The total number of rpm clocks are required to be updated to the correct index else it would not send RPM the first vote. Also update the bimc mux sel value. Add an extra mmssnoc_axi active vote of 19.2MHz. Change-Id: I502c72a18a3e3493f44cdf72f48efcbae41efb7b Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | Merge "clk: Fix handoff counts for parent of handoff enabled clocks"Linux Build Service Account2017-01-01
|\ \ \ \ | |/ / / |/| | |
| * | | clk: Fix handoff counts for parent of handoff enabled clocksAmit Nischal2016-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For commit 44aa223a3e4a ("clk: move check for CLK_ENABLE_HAND_OFF at unused tree") at unused tree level, prepare and enable counts are only decrementing for handoff enabled clock(having CLK_ENABLE_HAND_OFF flag) and counts are not decrementing for their parent clock. So fixing the same by adding clk_core_unprepare/disable at unused tree level for handoff enabled clocks so that parent handoff counts also gets decrement. Change-Id: Ib238540b2addbe8c9ff7f2e34428169c76e3f44b Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | | Merge "clk: qcom: clk-rcg2: Configure the RCGs to a safe frequency as needed"Linux Build Service Account2016-12-30
|\ \ \ \
| * | | | clk: qcom: clk-rcg2: Configure the RCGs to a safe frequency as neededDeepak Katragadda2016-12-28
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In certain cases, an RCG might be prone to being enabled even though the overlying software thinks that it disabled the RCG. In order to avoid letting the RCG go into an invalid state, support parking it at a safe frequency during clk_disable() and deferring all the RCG configuration updates to be done during clk_enable(), if a scaling request comes in whilst the clock is disabled. Change-Id: I55f1d1d346182a2b480127c57d6659fc9a63331b Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | msm: Rename msmtriton/apqtriton to sdm630/sda630Neeraj Upadhyay2016-12-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code name from msmtriton/apqtriton to sdm630/sda630. As part of this, update the filename containing "triton" and files content containing "triton". Change-Id: Ia558be75041e41e83d304d5fb4091c2a098e87c0 Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
* | | | msm: Rename msmfalcon/apqfalcon to sdm660/sda660Neeraj Upadhyay2016-12-28
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | Update the code name from msmfalcon/apqfalcon to sdm660/sda660. As part of this, update the filename containing "falcon" and files content containing "falcon". Change-Id: Iec85862251b9e1b4dcc8bdce8b214ce87c0049bc Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
* | | Merge "clk: qcom: Add voltage voting for MSM8996 GCC driver"Linux Build Service Account2016-12-26
|\ \ \
| * | | clk: qcom: Add voltage voting for MSM8996 GCC driverOdelu Kukatla2016-12-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Global Clock Controller(GCC) needs to vote for volatge level on rail for the clock frequencies, so add voltage voting in GCC. Also clean up clock flags and parent info for few clocks. Change-Id: Ib4cc69afb32a7654bbdd98f2efff901729c4d3da Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
* | | | Merge "clk: qcom: Add FORCE_ENABLE_RCGR & CLK_ENABLE_HAND_OFF flag for ↵Linux Build Service Account2016-12-26
|\ \ \ \ | | | | | | | | | | | | | | | MSMfalcon"
| * | | | clk: qcom: Add FORCE_ENABLE_RCGR & CLK_ENABLE_HAND_OFF flag for MSMfalconAmit Nischal2016-12-26
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some clocks are critical for system booting and should not be gated until a driver that knows best claims those clocks. Add CLK_ENABLE_HAND_OFF flag for system critical clocks. Also add FORCE_ENABLE_RCGR flag to force enable/disable RCG and fix camss_jpeg0 voter clock. Change-Id: I482bbf480d4129cdc6a1dfe08f37a1ec56c3131e Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* / / / clk: qcom: Add smd-rpm voter & voter branch clocks for MSM8996Amit Nischal2016-12-26
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MSM8996 requires the voter & voter branch clocks to be available for clients to be able to enable/disable and set rate on these clocks. Also add support for keeping active set vote on mmssnoc and pnoc voter clocks. Change-Id: Ie596ddee60aac3e6fc996f9a3e8dc988b0f4aa88 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | Merge "ARM: dts: msm: add mdss node for msmfalcon target"Linux Build Service Account2016-12-23
|\ \ \
| * | | clk: qcom: add MDSS PLL support for msmfalconSandeep Panda2016-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the msmfalcon compatible string to MDSS PLL driver dt table list so that MDSS PLL driver initialization takes place for msmflacon platform. Change-Id: I806456737485dfcbca8a71d59db0927bbd843708 Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
* | | | Merge "defconfig: msm: Add support for CPU OSM clock"Linux Build Service Account2016-12-23
|\ \ \ \
| * | | | clk: qcom: Support CPU clock for OSM for common clock frameworkTaniya Das2016-12-22
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following list of changes have been made - Update the clock osm to register to common clock framework - Update clock ops as per common clock framework - cleanup unused function (clk_osm_setup_osm_was) - Fix tabs for macro definitions - Add clocks ids for power and perf clock for clients Change-Id: I389cc9e93a26a434be752cf74444d6c0985ff36d Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | clk: move check for CLK_ENABLE_HAND_OFF at unused treeTaniya Das2016-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 04a0136aeea5 ("clk: introduce CLK_ENABLE_HAND_OFF flag") assumes that the first time clock client calls a clk_prepare & clk_enable, the clocks from that point of time could be on their own. But there could be use cases which could have impacts due to this handling. Moving the handoff counts for prepare and enable at unused tree level. Change-Id: I7d527571c2eb4d53d58d82126989bd673de12e2d Signed-off-by: Taniya Das <tdas@codeaurora.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-07-12 07:56:26 +0000