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path: root/drivers/clk (follow)
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| | * | | | | | clk: sunxi: Move mbus to mod0 fileMaxime Ripard2014-09-27
| | * | | | | | clk: sunxi: Move mod0 clock to a file of its ownMaxime Ripard2014-09-27
| | * | | | | | clk: sunxi: Introduce mbus compatibleMaxime Ripard2014-09-27
| | * | | | | | clk: sunxi: factors: Invert the probing logicMaxime Ripard2014-09-27
| | * | | | | | clk: Add a function to retrieve phaseMaxime Ripard2014-09-27
| | * | | | | | clk: introduce clk_set_phase function & callbackMike Turquette2014-09-27
| | * | | | | | clk: sunxi: add correct divider table for sun4i-apb0 clockChen-Yu Tsai2014-09-13
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| * | | | | | Merge tag 'v3.18-rockchip-cpuclk' of git://git.kernel.org/pub/scm/linux/kerne...Mike Turquette2014-09-27
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| | * | | | | clk: rockchip: switch to using the new cpuclk type for armclkHeiko Stuebner2014-09-27
| | * | | | | clk: rockchip: add new clock-type for the cpuclkHeiko Stuebner2014-09-27
| | * | | | | clk: rockchip: make tightly bound armclk child-clocks read-onlyHeiko Stuebner2014-09-27
| | * | | | | clk: rockchip: reparent aclk_cpu_pre to the gpllHeiko Stuebner2014-09-27
| | * | | | | clk: rockchip: fix rk3288 pll status register locationJianqun2014-09-27
| | * | | | | clk: rockchip: fix rk3066 pll status register locationHeiko Stuebner2014-09-27
| | * | | | | clk: rockchip: change pll rate without a clk-notifierDoug Anderson2014-09-27
| * | | | | | Merge tag 'clk-mvebu-3.18' of git://git.infradead.org/linux-mvebu into clk-nextMike Turquette2014-09-26
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| | * | | | | clk: mvebu: armada-375: Fix the description of the SAR in the commentGregory CLEMENT2014-09-09
| | * | | | | clk: mvebu: armada-370: Fix timer drift caused by the SSCG deviationGregory CLEMENT2014-09-09
| | * | | | | clk: mvebu: Fix clk frequency value if SSCG is enabledGregory CLEMENT2014-09-09
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| * | | | | clk: add gpio gated clockJyri Sarha2014-09-26
| * | | | | Merge tag 'qcom-clocks-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel...Mike Turquette2014-09-26
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| | * | | | | clk: qcom: Add support for banked MD RCGsStephen Boyd2014-09-22
| | * | | | | clk: qcom: Add support for setting rates on PLLsStephen Boyd2014-09-22
| | * | | | | clk: qcom: Consolidate frequency finding logicStephen Boyd2014-09-22
| | * | | | | clk: qcom: Add IPQ8064 PLL required for USBAndy Gross2014-09-22
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| * | | | | Merge tag 'tegra-clk-3.18' of git://nv-tegra.nvidia.com/user/pdeschrijver/lin...Mike Turquette2014-09-26
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| | * | | | clk: tegra: Make clock initialization more robustTomeu Vizoso2014-09-18
| | * | | | clk: tegra124: Add PLL_M_UD and PLL_C_UD clocksMikko Perttunen2014-09-18
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| * | | | clk: Remove .owner field for driverKiran Padwal2014-09-25
| * | | | Merge branch 'clk-next-rockchip' into clk-nextMike Turquette2014-09-25
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| | * | | clk: rockchip: add clock node in PD_VIDEOKever Yang2014-09-25
| | * | | clk: rockchip: use the clock id for nodes initKever Yang2014-09-25
| | * | | clk: rockchip: add missing rk3288 npll rate tableHeiko Stübner2014-09-25
| | * | | clk: rockchip: rk3288: fix softreset register countMark yao2014-09-25
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| * | | Merge branch 'clk-fixes' into clk-nextMike Turquette2014-09-17
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| * \ \ \ Merge branch 'clk-next-debugfs-lock' into clk-nextMike Turquette2014-09-10
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| | * | | | clk: Don't hold prepare_lock across debugfs creationStephen Boyd2014-09-10
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| * | | | clk: rockchip: also protect hclk_peri as criticalHeiko Stübner2014-09-10
| * | | | clk: fractional-divider: cast parent_rate to u64 before multiplyingHeiko Stübner2014-09-10
| * | | | clk: Add driver for Maxim 77802 PMIC clocksJavier Martinez Canillas2014-09-09
| * | | | clk: max77686: Convert to the generic max clock driverJavier Martinez Canillas2014-09-09
| * | | | clk: Add generic driver for Maxim PMIC clocksJavier Martinez Canillas2014-09-09
| * | | | clk: max77686: Add DT include for MAX77686 PMIC clockJavier Martinez Canillas2014-09-09
| * | | | clk: zynq: Move const initdata into correct code sectionSoren Brinkmann2014-09-09
| * | | | clk: zynq: Remove pointless return at end of void functionSoren Brinkmann2014-09-09
| * | | | clk: zynq: Remove unnecessary OOM messageSoren Brinkmann2014-09-09
| * | | | clk: at91: fix div by zero in USB clock driverBoris BREZILLON2014-09-02
| * | | | clk: at91: rework rm9200 USB clock to propagate set_rate to the parent clkBoris BREZILLON2014-09-02
| * | | | clk: at91: fix recalc_rate implementation of PLL driverBoris BREZILLON2014-09-02
| * | | | clk: at91: rework PLL rate calculationBoris BREZILLON2014-09-02
generated by cgit v1.2.3 (git 2.25.1) at 2026-03-21 11:01:36 +0000