summaryrefslogtreecommitdiff
path: root/drivers/clk/qcom (follow)
Commit message (Collapse)AuthorAge
...
* | | Merge "clk: qcom: Add support to set rcg parent src for dp_pixel clock"Linux Build Service Account2017-01-16
|\ \ \
| * | | clk: qcom: Add support to set rcg parent src for dp_pixel clockAmit Nischal2017-01-12
| |/ / | | | | | | | | | | | | | | | | | | | | | For set rate, dp_pixel_clk_src rcg requires the correct parent source to configured so add support for the same. Change-Id: I9c8ae2904b47dbe0bc6845e2ca38fbd2f126a7e5 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | clk: qcom: Move prepare enable parent sources for FORCE_ENABLE_RCGRTaniya Das2017-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move preparing/unpreparing the clock source parents from the clk set rate. This is required as invoking prepare from clk enable with disable irqs and prepare would take a mutex resulting in sleeping from invalid context. Change-Id: I90d8a346f684747f635bd9e7254ceb8d45841b05 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | clk: qcom: Fix for rate request to RPM during handoffAmit Nischal2017-01-12
|/ / | | | | | | | | | | | | | | | | For all rpm clocks, max rate request is going to RPM during handoff which always shows max requested rate value from APSS so fix the same. Change-Id: I4f184ea053fc1a40830eb9f555c24fdf17ba3fa1 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | Merge "clk: qcom: Add support to register GPU rbcpr clocks"Linux Build Service Account2017-01-10
|\ \
| * | clk: qcom: Add support to register GPU rbcpr clocksTaniya Das2017-01-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | GPU RBCPR clocks needs to registered separately, as GFX CPR would require the rbcpr clocks to register the regulator handle. Change-Id: I59def76e7dd69600be8faf47eb867a97ab04739e Signed-off-by: Amit Nischal <anischal@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | clk: qcom: Fix clocks which are required to be always onTaniya Das2017-01-10
|/ / | | | | | | | | | | | | | | | | | | | | | | Following are the changes made: 1. Add CLK_IGNORE_UNUSED flag for some clocks which are not supposed to be disabled at late_init_level. 2. Fix clock measure debug mux value for mmcc clocks. 3. Add mmss_mdss_byte1_intf_div_clk for mdp. 4. Fix usb ref clocks to branch voted. Change-Id: I06396c73f7855acfac283abe576e0b4cc1a92bd5 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | clk: qcom: osm: remove ioremaps from panic callbackTaniya Das2017-01-05
| | | | | | | | | | | | | | | | | | | | Calling ioremap() in clk_osm_panic_callback() can result in BUG() when the kernel is panic-ing. It is not safe to use ioremap() in atomic context. Map the debug registers at probe time instead. Change-Id: I4009ea6e10df2dc8649cf0b0c1a5b6398d3c689e Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | clk: qcom: Remove mmssnoc_a_clk_cpu_vote clock instance for msm8996Amit Nischal2017-01-03
| | | | | | | | | | | | | | | | mmssnoc_a_clk_cpu_vote clock is not required on msm8996, so remove the clock instance for the same. Change-Id: Ibf1cbb9dc67c9255df09c32a67c320f8bb3ecbc7 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | clk: qcom: Add handoff support for smd-rpm and voter rpm clocksAmit Nischal2017-01-03
| | | | | | | | | | | | | | | | | | | | Some smd-rpm and voter rpm clocks are critical for system booting and should not be gated until a unused clock tree late_init level. So add support for handoff functionality for system critical rpm clocks by using CLK_ENABLE_HAND_OFF flag. Change-Id: I9f9674a25fc5f7a2bc9b5672b00716b82223b06b Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | clk: qcom: smd-rpm: Update the number of rpm clocks for sdm660Taniya Das2017-01-02
| | | | | | | | | | | | | | | | | | The total number of rpm clocks are required to be updated to the correct index else it would not send RPM the first vote. Also update the bimc mux sel value. Add an extra mmssnoc_axi active vote of 19.2MHz. Change-Id: I502c72a18a3e3493f44cdf72f48efcbae41efb7b Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | Merge "clk: qcom: clk-rcg2: Configure the RCGs to a safe frequency as needed"Linux Build Service Account2016-12-30
|\ \
| * | clk: qcom: clk-rcg2: Configure the RCGs to a safe frequency as neededDeepak Katragadda2016-12-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In certain cases, an RCG might be prone to being enabled even though the overlying software thinks that it disabled the RCG. In order to avoid letting the RCG go into an invalid state, support parking it at a safe frequency during clk_disable() and deferring all the RCG configuration updates to be done during clk_enable(), if a scaling request comes in whilst the clock is disabled. Change-Id: I55f1d1d346182a2b480127c57d6659fc9a63331b Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | msm: Rename msmtriton/apqtriton to sdm630/sda630Neeraj Upadhyay2016-12-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code name from msmtriton/apqtriton to sdm630/sda630. As part of this, update the filename containing "triton" and files content containing "triton". Change-Id: Ia558be75041e41e83d304d5fb4091c2a098e87c0 Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
* | | msm: Rename msmfalcon/apqfalcon to sdm660/sda660Neeraj Upadhyay2016-12-28
|/ / | | | | | | | | | | | | | | | | Update the code name from msmfalcon/apqfalcon to sdm660/sda660. As part of this, update the filename containing "falcon" and files content containing "falcon". Change-Id: Iec85862251b9e1b4dcc8bdce8b214ce87c0049bc Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
* | Merge "clk: qcom: Add voltage voting for MSM8996 GCC driver"Linux Build Service Account2016-12-26
|\ \
| * | clk: qcom: Add voltage voting for MSM8996 GCC driverOdelu Kukatla2016-12-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Global Clock Controller(GCC) needs to vote for volatge level on rail for the clock frequencies, so add voltage voting in GCC. Also clean up clock flags and parent info for few clocks. Change-Id: Ib4cc69afb32a7654bbdd98f2efff901729c4d3da Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
* | | Merge "clk: qcom: Add FORCE_ENABLE_RCGR & CLK_ENABLE_HAND_OFF flag for ↵Linux Build Service Account2016-12-26
|\ \ \ | | | | | | | | | | | | MSMfalcon"
| * | | clk: qcom: Add FORCE_ENABLE_RCGR & CLK_ENABLE_HAND_OFF flag for MSMfalconAmit Nischal2016-12-26
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some clocks are critical for system booting and should not be gated until a driver that knows best claims those clocks. Add CLK_ENABLE_HAND_OFF flag for system critical clocks. Also add FORCE_ENABLE_RCGR flag to force enable/disable RCG and fix camss_jpeg0 voter clock. Change-Id: I482bbf480d4129cdc6a1dfe08f37a1ec56c3131e Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* / / clk: qcom: Add smd-rpm voter & voter branch clocks for MSM8996Amit Nischal2016-12-26
|/ / | | | | | | | | | | | | | | | | | | | | MSM8996 requires the voter & voter branch clocks to be available for clients to be able to enable/disable and set rate on these clocks. Also add support for keeping active set vote on mmssnoc and pnoc voter clocks. Change-Id: Ie596ddee60aac3e6fc996f9a3e8dc988b0f4aa88 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | Merge "ARM: dts: msm: add mdss node for msmfalcon target"Linux Build Service Account2016-12-23
|\ \
| * | clk: qcom: add MDSS PLL support for msmfalconSandeep Panda2016-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the msmfalcon compatible string to MDSS PLL driver dt table list so that MDSS PLL driver initialization takes place for msmflacon platform. Change-Id: I806456737485dfcbca8a71d59db0927bbd843708 Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
* | | clk: qcom: Support CPU clock for OSM for common clock frameworkTaniya Das2016-12-22
|/ / | | | | | | | | | | | | | | | | | | | | | | Following list of changes have been made - Update the clock osm to register to common clock framework - Update clock ops as per common clock framework - cleanup unused function (clk_osm_setup_osm_was) - Fix tabs for macro definitions - Add clocks ids for power and perf clock for clients Change-Id: I389cc9e93a26a434be752cf74444d6c0985ff36d Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | Merge "clk: qcom: Add new voter clocks for camss clocks"Linux Build Service Account2016-12-21
|\ \
| * | clk: qcom: Add new voter clocks for camss clocksTaniya Das2016-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add new voter clocks of camss_jpeg0 clocks which are required by camera client. Update the clock indexes for multimedia clocks for the same. Also update the clock ops for hardware control branch clocks. Change-Id: I4bc6608789b8b900e0af007d2ca24ba19f675cb7 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | Merge "ARM: dts: msm: Add support for clock debug for MSMfalcon/MSMtriton"Linux Build Service Account2016-12-21
|\ \ \ | |/ / |/| |
| * | clk: qcom: Add support for debugfs for MSMfalconTaniya Das2016-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | The debugfs measure would be required to be supported for clocks whose frequency could be measured using the ring oscillator. Add the debug mux sel indexes for all the clocks supporting measure. Change-Id: I0a28b320aa910d27987162dfcbe4e43aeca341fa Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | Merge "clk: qcom: mmcc: Update the DSI PLL parent names"Linux Build Service Account2016-12-19
|\ \ \
| * | | clk: qcom: mmcc: Update the DSI PLL parent namesTaniya Das2016-12-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The byte and pixel clocks RCG sources from their dsi byte/pixel PLLs, update the parent names so that those parents could be requested. Change-Id: Ie92df31a5cdfa176e872d721a84475a37172a2dd Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | Merge "clk: qcom: Add support for hardware control branch"Linux Build Service Account2016-12-19
|\ \ \ \ | |_|/ / |/| | |
| * | | clk: qcom: Add support for hardware control branchTaniya Das2016-12-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are the branches which have hardware control bit to be able to enable/disable the branch. They also need to support set rate on them and before setting any rate, we have to make sure the current parent and the next parent is prepared & enabled before the RCG is updated. To support both parents to be prepared/enabled use the flag FORCE_ENABLE_RCGR. Change-Id: I14abed3827de8cefc31f3deb3c1e589136c32b8d Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | Merge "clk: qcom: Add support for debugfs measure clock"Linux Build Service Account2016-12-19
|\ \ \ \ | |_|/ / |/| | |
| * | | clk: qcom: Add support for debugfs measure clockTaniya Das2016-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce clk_debug_mux which would support clocks to be allowed to measure clock frequency from debugfs. Change-Id: I81c32a876b33f5a7773485a76897ff9cbed45a76 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | clk: qcom: add common clock framework support for MDSS PLLSandeep Panda2016-12-16
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | Model and configure MDSS DSI PLL using upstream clock framework APIs. Add changes to define and register vco, divider, mux clcoks as per common clock infrastructure. Change-Id: Idc51070e2bb36d1a757d2714d2875a99901321a7 Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
* | | clk: qcom: Update fmax tables and few frequencies clocks of MSMfalconTaniya Das2016-12-13
|/ / | | | | | | | | | | | | | | The fmax corner frequencies have got updated, and also new frequencies have been added for few clocks, so fix and update the same. Change-Id: Ic6e2c2208a8971b07ed6ccfc8d63091e4692301f Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | Merge "ARM: dts: msm: Update GPUCC clock frequencies for MSMtriton"Linux Build Service Account2016-12-06
|\ \
| * | clk: qcom: gpucc: Update gpu clock support for msmtritonTaniya Das2016-12-06
| | | | | | | | | | | | | | | | | | | | | | | | The gpu clock frequencies are different from the current supported frequencies, so update the same. Change-Id: I78e3b241390f9f5c7d8600d8ce933d9ffc9845fa Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | Merge "clk: qcom: Add additional delay while enabling votable clocks"Linux Build Service Account2016-12-06
|\ \ \
| * | | clk: qcom: Add additional delay while enabling votable clocksTaniya Das2016-12-03
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the GDSC enable sequence, the GDS_HW_CTRL forces some clocks to be on to trigger the handshake to unhalt the SMMU and NOC. Once the handshake completes, the controller asserts the PWR_ON status and disables the clocks. If the clock driver tries enabling the SMMU ahb/axi clocks immediately, there is a possibility that these clocks might still not have gone through their disable sequence; especially if the AXI/AHB rates are very low. If this happens, the clock driver falsely assumes that the clocks are on and returns. Any SMMU accesses/traffic at this point might lead to a failure since the clock could turn off. Change-Id: I544ca82e20e1c026d0ff1881c96edd33bf362b7d Signed-off-by: Taniya Das <tdas@codeaurora.org>
* / / clk: qcom: Add RCG support for DP pixel sourceTaniya Das2016-12-05
|/ / | | | | | | | | | | | | Add a new RCG clock ops specific for the DP pixel clock source. Change-Id: I2ec5ddcfd47af8362f76d76d153e30d4e2f45370 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | Merge "clk: qcom: Add support to convert the clock rate to KHz"Linux Build Service Account2016-11-26
|\ \
| * | clk: qcom: Add support to convert the clock rate to KHzAmit Nischal2016-11-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Before sending the RPM clock rate request, rate should be in KHz so fixing the same by converting the rate to KHz and also fix some clock ids. Change-Id: I3fb59f96b419bdb91f9a04cc47ab1c23d15dc74b Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | Merge "clk: qcom: Add snapshot of OSM CPU clock driver"Linux Build Service Account2016-11-24
|\ \ \
| * | | clk: qcom: Add snapshot of OSM CPU clock driverOsvaldo Banuelos2016-11-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a snapshot of the OSM clock driver as of msm-4.4 'commit 38833d662143 ("clk: msm: clock-osm: Request Nominal Fmax frequency after OSM enable")' Fix warnings for of_device_id and return from void function. Change-Id: I242158975f212426268fd6eaf45378826d56d094 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | Merge "clk: qcom: Add support for rf clk1 for msmfalcon"Linux Build Service Account2016-11-24
|\ \ \ \
| * | | | clk: qcom: Add support for rf clk1 for msmfalconTaniya Das2016-11-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RF clock 2 is not required on msmfalcon, so remove the clock instance and add rf clk1 support instead. Change-Id: I13258295e9ae9c8607586ed5686e97276823d08c Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | | Merge "clk: qcom: Add support for MMCC clock for MSMFalcon"Linux Build Service Account2016-11-24
|\ \ \ \ \
| * | | | | clk: qcom: Add support for MMCC clock for MSMFalconTaniya Das2016-11-21
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the multimedia clock controller found on MSMFalcon based devices. This should allow most clocks for multimedia peripherals which includes display, video, camera etc. Change-Id: If8aa0b094af5ff82fe66c95e3ef2f13632950d2e Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | | Merge rel/msm-4.4 on remote branchKyle Yan2016-11-23
|\ \ \ \ \ | |_|_|/ / |/| | | | | | | | | | | | | | Change-Id: Id919aee14aa3898b8168015a3ae310437d604812 Signed-off-by: Kyle Yan <kyan@codeaurora.org>
| * | | | msm: 8998: Replace cobalt with 8998Runmin Wang2016-11-22
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code name from msmcobalt to msm8998. As a result, update the filename containing "cobalt" and files content containing "cobalt". CRs-Fixed: 1070840 Change-Id: I2c7b95e3e2a2fec7730724da9eeb86a39a77faf1 Signed-off-by: Runmin Wang <runminw@codeaurora.org> Signed-off-by: Kyle Yan <kyan@codeaurora.org> Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-29 03:37:11 +0000