| Commit message (Expand) | Author | Age | ||
|---|---|---|---|---|
| ... | ||||
| | * | | | | | | | | | | | | | | | | | | x86/speculation/mds: Add SMT warning message | Josh Poimboeuf | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Move arch_smt_update() call to after mitigation decisions | Josh Poimboeuf | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/cpu/bugs: Use __initconst for 'const' init data | Andi Kleen | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | Documentation: Move L1TF to separate directory | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation/mds: Add mitigation mode VMWERV | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation/mds: Add sysfs reporting for MDS | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation/mds: Add mitigation control for MDS | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation/mds: Conditionally clear CPU buffers on idle entry | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation/mds: Clear CPU buffers on exit to user | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation/mds: Add BUG_MSBDS_ONLY | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation/mds: Add basic bug infrastructure for MDS | Andi Kleen | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Consolidate CPU whitelists | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Provide IBPB always command line options | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Add seccomp Spectre v2 user space protection mode | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Enable prctl mode for spectre_v2_user | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Add prctl() control for indirect branch speculation | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Prevent stale SPEC_CTRL msr content | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Prepare arch_smt_update() for PRCTL mode | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Split out TIF update | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Prepare for conditional IBPB in switch_mm() | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Avoid __switch_to_xtra() calls | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/process: Consolidate and simplify switch_to_xtra() code | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Prepare for per task indirect branch speculation control | Tim Chen | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Add command line control for indirect branch speculation | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Unify conditional spectre v2 print functions | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculataion: Mark command line parser data __initdata | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Mark string arrays const correctly | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Reorder the spec_v2 code | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Rework SMT state change | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Reorganize speculation control MSRs update | Tim Chen | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Rename SSBD update functions | Thomas Gleixner | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Disable STIBP when enhanced IBRS is in use | Tim Chen | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Move STIPB/IBPB string conditionals out of cpu_show_common() | Tim Chen | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Remove unnecessary ret variable in cpu_show_common() | Tim Chen | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Clean up spectre_v2_parse_cmdline() | Tim Chen | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Propagate information about RSB filling mitigation to sysfs | Jiri Kosina | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation | Jiri Kosina | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/cpu: Sanitize FAM6_ATOM naming | Peter Zijlstra | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/microcode: Update the new microcode revision unconditionally | Filippo Sironi | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/microcode: Make sure boot_cpu_data.microcode is up-to-date | Prarit Bhargava | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/bugs: Fix the AMD SSBD usage of the SPEC_CTRL MSR | Tom Lendacky | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/bugs: Switch the selection of mitigation from CPU vendor to CPU features | Konrad Rzeszutek Wilk | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/bugs: Add AMD's SPEC_CTRL MSR usage | Konrad Rzeszutek Wilk | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/bugs: Add AMD's variant of SSB_NO | Konrad Rzeszutek Wilk | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Simplify the CPU bug detection logic | Dominik Brodowski | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/speculation: Support Enhanced IBRS on future CPUs | Sai Praneeth | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/MCE: Save microcode revision in machine check records | Tony Luck | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/microcode/intel: Check microcode revision before updating sibling threads | Ashok Raj | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | x86/microcode/intel: Add a helper which gives the microcode revision | Borislav Petkov | 2019-05-16 | |
| | * | | | | | | | | | | | | | | | | | | perf/x86/intel: Fix handling of wakeup_events for multi-entry PEBS | Stephane Eranian | 2019-05-16 | |
