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* MIPS: OCTEON: Add semaphore to serialize bootbus accesses.David Daney2015-04-01
* MIPS: BMIPS: Use a non-default FIXADDR_TOP settingKevin Cernekee2015-04-01
* MIPS: bcm3384: Rename "bcm3384" target to "bmips"Kevin Cernekee2015-04-01
* MIPS: Fall back to generic implementation of cmpxchg64 on 32-bit platformsDeng-Cheng Zhu2015-04-01
* MIPS: OCTEON: Add mach-cavium-octeon/mangle-port.hDavid Daney2015-04-01
* MIPS: Octeon: Handle bootloader structures in little-endian mode.David Daney2015-04-01
* MIPS, ttyFDC: Add early FDC console supportJames Hogan2015-03-31
* MIPS: Read CPU IRQ line that FDC to routed toJames Hogan2015-03-31
* MIPS: Add architectural FDC IRQ fieldsJames Hogan2015-03-31
* MIPS: Add CDMM bus supportJames Hogan2015-03-31
* MIPS: Add arch CDMM definitions and probingJames Hogan2015-03-31
* MIPS: cevt-r4k: Move handle_perf_irq() out of headerJames Hogan2015-03-31
* MIPS: Add support for the IMG Pistachio SoCAndrew Bresticker2015-03-31
* MIPS: Create a common <asm/mach-generic/war.h>Kevin Cernekee2015-03-31
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-21
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| * MIPS: OCTEON: More OCTEONIII supportChandrakala Chavva2015-02-20
| * MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.Chad Reese2015-02-20
| * MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.David Daney2015-02-20
| * MIPS: OCTEON: Update octeon-model.h code for new SoCs.David Daney2015-02-20
| * MIPS: OCTEON: Implement DCache errata workaround for all CN6XXXDavid Daney2015-02-20
| * MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.hDavid Daney2015-02-20
| * MIPS: OCTEON: Implement the core-16057 workaroundDavid Daney2015-02-20
| * MIPS: OCTEON: Save and restore CP2 SHA3 stateDavid Daney2015-02-20
| * MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUsDavid Daney2015-02-20
| * MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.hDavid Daney2015-02-20
| * MIPS: ip22-gio: Remove legacy suspend/resume supportLars-Peter Clausen2015-02-20
| * mips: pci: Add ifdef around pci_proc_domainZubair Lutfullah Kakakhel2015-02-20
| * MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-20
| * MIPS: Usage and cosmetic cleanups of page table bits.Steven J. Hill2015-02-19
| * Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/...Ralf Baechle2015-02-19
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| | * MIPS: kernel: elf: Improve the overall ABI and FPU mode checksMarkos Chandras2015-02-17
| | * MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6Markos Chandras2015-02-17
| | * MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as wellMarkos Chandras2015-02-17
| | * MIPS: Make use of the ERETNC instruction on MIPS R6Markos Chandras2015-02-17
| | * MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6Leonid Yegoshin2015-02-17
| | * MIPS: asm: mipsregs: Add support for the LLADDR registerMarkos Chandras2015-02-17
| | * MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras2015-02-17
| | * MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructionsMarkos Chandras2015-02-17
| | * MIPS: Emulate the new MIPS R6 BEQZC and JIC instructionsMarkos Chandras2015-02-17
| | * MIPS: Emulate the new MIPS R6 BALC instructionMarkos Chandras2015-02-17
| | * MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructionsMarkos Chandras2015-02-17
| | * MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructionsMarkos Chandras2015-02-17
| | * MIPS: Emulate the new MIPS R6 branch compact (BC) instructionMarkos Chandras2015-02-17
| | * MIPS: Emulate the BC1{EQ,NE}Z FPU instructionsMarkos Chandras2015-02-17
| | * MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6Markos Chandras2015-02-17
| | * MIPS: kernel: r4k_switch: Add support for MIPS R6Leonid Yegoshin2015-02-17
| | * MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfoMarkos Chandras2015-02-17
| | * MIPS: asm: local: Set the appropriate ISA level for MIPS R6Markos Chandras2015-02-17
| | * MIPS: asm: spinlock: Replace "sub" instruction with "addiu"Markos Chandras2015-02-17
| | * MIPS: asm: futex: Set the appropriate ISA level for MIPS R6Markos Chandras2015-02-17
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