| Commit message (Collapse) | Author | Age |
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Debounce delay range and hence the bit encodings got changed in
PON GEN2 peripheral. Fix qpnp_pon_set_dbc() to configure the
debounce delay properly.
CRs-Fixed: 1097089
Change-Id: Ia3d474a04e11c7d16a1507d65e99001cf844947b
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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Add initial device tree support for CDP, MTP and RCM
platforms of msmfalcon.
Change-Id: I2e4591c50fe3db61ed3a4364647579bf254d0edd
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
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Some panels need to send the dcs commands for mode
switch in HS mode instead the default LP mode due time
constraints. Add entries so the panels can be configured
to HS mode if required for the mode switch.
Change-Id: Ie41ad1965384b131db343c54f888ade82fc45e31
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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Add a DT property to adjust the open-loop voltage for the LDO
corners, this will be useful for voltage adjustments after
LDO characterization.
While at it, update the LDO MIN_VOLTAGE value for 8953.
CRs-Fixed: 1010052
Change-Id: I7479ebbf0ac7253eb355246d36f15a91ce96cd9a
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
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Remove all reference to internal code name msmtitanium
and replace them with msm8953, as there is an official
announcement for msm8953 SoC.
Change-Id: If99bbf20756a524c5a3bd7ba49366c29e158289e
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
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It is required to put/get vote for aggre2_snoc_axi_clk before turning
ON USB core clock for read/write transactions to be successful over
NOC from USB->DDR. Hence add support for voting aggre2_snoc_axi_clk
before enabling USB core clock as part of exiting low power mode.
Change-Id: Icb17d65fbbe49d93971905948c3dc9ab17de152a
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
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Clear the CX iPeak bit if it was set by MSS before crash.
MSS sets this bit if it was in Turbo state. In a situation
where all the votes were set (including MSS), It would have
resulted in CDSP throttling. But when MSS is in crashed state,
It cannot be cleared by MSS, So PIL needs to do this. It
would allow possible clearance of throttle state.
Change-Id: Ia561436a362dc5b0e1cb22c30ce9f5b8bb027a1f
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
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Auto recharge happens when the charging is complete and the
battery SOC or voltage had dropped below certain threshold.
Along with having an option to configure recharge SOC threshold,
a way to configure recharge voltage threshold is required. Add
it. By default, charger is configured to resume charging only
based on the signal from FG based on battery voltage.
Change-Id: I0cd6ca6679c19bbdf4ad980a22d9976396028316
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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Add support for configuring the highest memory accelerator
(MEM ACC) threshold voltage. This threshold voltage is used at
runtime to determine which CPRh virtual corner to program into
the OSM sequencer registers in place of the fixed MEM ACC
configuration specified in the OSM LUT.
CRs-Fixed: 1088429
Change-Id: Ida29eaca139c1ddd6439d11a8bd51526366f2a34
Signed-off-by: David Collins <collinsd@codeaurora.org>
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Add support for configuring the memory accelerator (MEM ACC)
threshold voltage and the MEM ACC crossover voltage.
The threshold voltage is used to restrict the floor to ceiling
voltage range of all corners so that they cannot cross the
the MEM ACC threshold voltage due to CPR operation. The
crossover voltage is set when switching the MEM ACC
configuration.
If specified, the APM and MEM ACC crossover voltages are added
to the array of corners after all true corners. If both are
specified, then the APM crossover corner is added before the MEM
ACC crossover corner (i.e. last corner = MEM ACC crossover and
second to last corner = APM crossover).
CRs-Fixed: 1088429
Change-Id: I2b9b746071579ba9d4bcdcfb6cb755ca08a73182
Signed-off-by: David Collins <collinsd@codeaurora.org>
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Commit ff19fe24e621ae5dc90f7e45fe4cfe159a647d15 ("mdss:
dsi: turn off phy power supply during static screen")
turns off the dsi phy during idle pc for phy rev 2.0. DSI
lanes are in floating state after dsi phy power off and
all panels may not be able to handle it. This change
allows to turn on the feature based on panel capability.
Change-Id: I9b166df254128a8a53c567f88971779b9ad0f36c
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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Some platforms may have a SOC pin/gpio connected to UFS device's
RST_n to allow the UFS device reset. This change adds support to
trigger device reset on such platforms.
Change-Id: Ie4faa47fb76837dba909f9a3d0dfe11bc69659e1
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
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Currently, smb2 charger uses VBT_LT_CHG_RECHARGE_THRESH signal
from FG to enable auto recharge by default. Add support to
configure smb2 charger to use SOC_LT_CHG_RECHARGE_THRESH signal
from FG if needed.
This will enable charging to resume again when battery SOC drops
below the automatic recharge SOC threshold (configured in FG)
while charger is inserted and SOC goes down after the charge
termination had happened.
Change-Id: Ic68cd12cc861d04e107b70e2b96200483f13da26
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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MSM falcon supports 10-bit decode. This commit will
parse 10-bit entries from dtsi and will use
corresponding bus table based on session type.
Change-Id: I7e3655be5c3ea0800499cf24c05899f3d518bbd6
Signed-off-by: Deepak Kushwah <dkushwah@codeaurora.org>
CRs-Fixed: 1087798
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Add support for the multimedia clock controller found on MSMFalcon
based devices. This should allow most clocks for multimedia peripherals
which includes display, video, camera etc.
Change-Id: If8aa0b094af5ff82fe66c95e3ef2f13632950d2e
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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Update the code name from msmcobalt to msm8998. As a result, update
the filename containing "cobalt" and files content containing "cobalt".
CRs-Fixed: 1070840
Change-Id: I2c7b95e3e2a2fec7730724da9eeb86a39a77faf1
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
Signed-off-by: Kyle Yan <kyan@codeaurora.org>
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
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The WLED boost controller in pmicobalt supports auto PFM mode when
LCD mode is selected. Auto PFM mode is enabled by default except
on some specific hardware versions. Add a property to specify
AUTO_PFM_THRESHOLD for the boost controller so that it can enter
PFM mode when the adaptive headroom voltage falls below the
threshold.
CRs-Fixed: 1081738
Change-Id: I964b3452d0cdb3618b4ab446655ae75fa3a1049d
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
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WLED in pmicobalt supports AUTO_GM configuration in CTRL_VLOOP_COMP_GM
register. Add two properties to enable auto-gm and set auto-gm threshold.
Meanwhile, move "qcom,loop-ea-gm" property outside of AMOLED constraint
because WLED in LCD mode also support it.
CRs-Fixed: 1081738
Change-Id: Iee99e9d1b999c84ece075d2f17e9cdf6aef9a2ac
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
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Add support for configuring the three thermal mitigation
thresholds from device tree.
CRs-Fixed: 1060212
Change-Id: Iafb7915e196a18b5f8076dda8fb06a4bd71a8e6e
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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Add support to configure thermal debounce, hysteresis and
ramp down rates from device tree.
CRs-Fixed: 1060212
Change-Id: Iabe79bae5f9471c3c6128ed21efd04de00739daa
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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There are some features which needs to be enabled based on the
PMIC. PMIC information such as subtype, revision can be obtained
from revid peripheral. Hence add support to read pmic revid.
Change-Id: Ie7a94f59e58b8f1b0816afda2496449694629205
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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WLED module in pmicobalt has different VREF_CONTROL settings with current
WLED module which is existing in pmi8994/pmi8952, including min voltage,
max voltage, step size and default voltage. Add support for it.
CRs-Fixed: 1081738
Change-Id: Ibaa555cec8cfd296125af3e6277df5331f5c438b
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
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Use the src clock binding to read the cpp src clock rate intead of
using the list rate api from clock driver.
CRs-Fixed: 1079648
Change-Id: I2ebdc0c41c521e56a400d685b6254174cffdc14b
Signed-off-by: Krishnankutty Kolathappilly <kkolatha@codeaurora.org>
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Clients of PCIe determine the size and transfer speed of
incoming IP packets. In order to ensure ordering of all
packets, each client requires different PCIe write halt
sizes. Thus, make this PCIe setting configurable.
Change-Id: I208c8c83a8f5ee8efadf01175f60d70fb4bf48cf
Signed-off-by: Tony Truong <truong@codeaurora.org>
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Allow the mitigation clamp current values for the leds to be
configured through the device tree.
CRs-Fixed: 1060212
Change-Id: I23bf67fba7cef2735db436899a9d5b3306e5a77f
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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Currently multiple regulator devices can be specified for LED
switch device though a switch device may just require one supply.
Also, before the switch device is enabled, voltage request is
sent to set the maximum voltage. This is not needed with the
regulators like BoB being used as supply for the switch device.
Just enabling the regulator is enough during switch operation.
Modify the way the regulator is obtained and controlled for
switch operation.
Since BoB regulator is configured by the bootloader properly
for flash operation, remove them from the supply list of LED
switch devices on pmicobalt and pm2falcon.
While at it, fix the way device tree properties are read from
flash/torch, switch devices.
CRs-Fixed: 1083246
Change-Id: I8eb5f305f89bc18ad4b735bd89cbf259f0e1ea11
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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As per the hardware documentation, PFM needs to be disabled for
LAB regulator during slow start. When the display is turned off,
PFM needs to be disabled with the default current limit. When the
display is turned on, after VREG_OK interrupt fires, PFM needs to
be enabled after overriding the current limit. Add support for
it. Currently this is required only for pmicobalt.
While at it, fix the current limit configuration for LAB
regulator.
CRs-Fixed: 1024407
Change-Id: Icb3781ca31dd8474cfca077c52593dc69d011127
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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Set LAB's precharge time to max 500us to optimize the precharge
behavior as suggested in the hardware documentation.
CRs-Fixed: 1084297
Change-Id: I118f4254686caf498087847916b7710662ab31e7
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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