| Commit message (Collapse) | Author | Age |
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Minidump is concise and bare minimum dump to enable technology
teams to debug most of subsystem issues. This change adds required
driver code changes to provide support of subsystem minidump.
Increase PIL timeout to give MBA more time for encryption
and decryption for modem segments.
Change-Id: I1d04a9306ce507bc610777bc476197f26c1e18ac
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
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SSR failures are considered fatal and results in system panic.
In certain scenarios system can continue to work even with a
failed subsystem.
Add an option in subsystem descriptor to relax on ssr failures.
Change-Id: I86dcaa615d6443937077880d9a91070d9c22ea1f
Signed-off-by: Arun KS <arunks@codeaurora.org>
[satyap@codeaurora.org: trivial merge conflict resolution]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
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Currently, the MBA is expected to be loadable at any
region in DDR. However, due to limitations in the modem
PBL or MBA image, this is not always possible. Allow
the modem to be loaded in a carved out CMA heap if specified
in device tree. Current memory APIs do not allow the association
of more than one memory region with a device; therefore
allow the existence of an optional sub-device node that
will contain the memory region property for the MBA.
CRs-Fixed: 2006100
Change-Id: Ia2b52be55f0b3f23278e1f71106fdb46de1d0fe1
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
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Clear the CX iPeak bit if it was set by MSS before crash.
MSS sets this bit if it was in Turbo state. In a situation
where all the votes were set (including MSS), It would have
resulted in CDSP throttling. But when MSS is in crashed state,
It cannot be cleared by MSS, So PIL needs to do this. It
would allow possible clearance of throttle state.
Change-Id: Ia561436a362dc5b0e1cb22c30ce9f5b8bb027a1f
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
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Update the reset sequence to support qdspv62-1-5 for MSMFALCON.
Also Enable one more memory bank during reset sequence for MSMFALCON.
Change-Id: Ib0d27c13c0ebdfac629c1469c9a91a0b84d03640
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
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Subsystem ramdump collection as of now happen segmentwise, but sometime
there are hole in between segment where dynamic image is loaded and
which need to be captured during subsystem ramdump collection.
This change will dump complete subsystem memory rather than only segments
based on the configuration of subsystem who desire it.
Change-Id: I5075a90817d1a4d00d69ad39d892dbbc40b0b0dc
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
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Add support to make scm_calls to TZ to inform modem start
address and size so that TZ can unmap this range to avoid
speculative access.
Change-Id: I4640ddab56991522870e9879d17fe5732dc40223
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Signed-off-by: Arun KS <arunks@codeaurora.org>
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On few recent targets APSS L2 memory is moved to APC domain which were
earlier on Mx domain. This can cause inrush current while bringing up
huge memories like modem and adsp.
To mitigate inrush current, bring up comparatively lesser memory in
size(for eg MDP memory) before bringing up huge memories like modem or
adsp. This way MDP memory introduce an intermediate load on MX rail.
During boot, gdsc driver will set MEM and PERIPHERAL bits. This driver
makes sure that dependent subsystems are powered up. Once done, call
gdsc_allow_clear_retention() API to allow retention of MDP memories.
Change-Id: I54011eb1b6cc38b2c33a67b8b9cc5eaadbd42c6a
Signed-off-by: Arun KS <arunks@codeaurora.org>
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Update the reset sequence to read and override acc register based on msm
specific value provided in device tree.
Change-Id: I8ed290f5ab5e48e94ef5c8c91fd1d8f8414e86f7
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
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This patch adds the code to handle watchdog, err_ready and other
interrupts from secure processor subsystem to the PIL driver.
CRs-Fixed: 972423
Change-Id: I65455229ee14bd4da357358ac3977f2137f3c07e
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
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This is a snapshot of PIL, SSR and SYSMON drivers and libraries as
of msm-3.18 commit
5cef33a285e91869cebe40a25e6294ae1e5fc9cc
(Merge "ASoC: msm: Update the AFE clock API support")
Change-Id: Ibebddee32b15fbcb5b18cceac43769d3309e609c
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
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