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* msm: pcie: add support for switch latencyRama Krishna Phani A2017-08-01
| | | | | | | | Add support for switch latency property to add additional delay if switch is present. Change-Id: Ia64a79d5ec51d3abb66cebd0a187349711c96af2 Signed-off-by: Rama Krishna Phani A <rphani@codeaurora.org>
* msm: pcie: expand PCIe boot optionTony Truong2017-04-04
| | | | | | | | | PCIe clients and endpoints have different boot sequence. Expand the boot options in PCIe bus driver to meet their requirements. Change-Id: Ia244fd402b784e511eefb550d9814d3b708879fd Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: support configurable wr halt size for PCIeTony Truong2016-11-10
| | | | | | | | | | Clients of PCIe determine the size and transfer speed of incoming IP packets. In order to ensure ordering of all packets, each client requires different PCIe write halt sizes. Thus, make this PCIe setting configurable. Change-Id: I208c8c83a8f5ee8efadf01175f60d70fb4bf48cf Signed-off-by: Tony Truong <truong@codeaurora.org>
* Merge "msm: pcie: configurable PERST propagation delay"Linux Build Service Account2016-09-29
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| * msm: pcie: configurable PERST propagation delayTony Truong2016-09-15
| | | | | | | | | | | | | | | | | | Provide clients the option to change the time delay after PCIe asserts or de-asserts PERST GPIO. The required delay for successful link training differs on each endpoint. Change-Id: I7d1e4d5cc421b800d2f00b6d23f6ff19ba4c4c7d Signed-off-by: Tony Truong <truong@codeaurora.org>
* | msm: pcie: add support for reset controller frameworkTony Truong2016-09-19
|/ | | | | | | | | | | The current api which performs the clock reset is moved to use the reset framework, so support the changes in PCIe driver for the same. The reset framework requires to get reset handle and perform assert/deassert of the resets. Change-Id: I1ca8bb386673f0db020554659f69c71b540e3dcc Signed-off-by: Amit Nischal <anischal@codeaurora.org> Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add support to get PCIe port PHY sequence from DTTony Truong2016-05-24
| | | | | | | | | PCIe PHY varies between each chipset. Thus, the port PHY init sequence on each of these chipsets are also different. Therefore, add the support to read PCIe port PHY init sequence from devicetree. Change-Id: I92969b7b59a64018b80470566567887248ced2bd Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: retrieve PCIe SMMU SID base from DTTony Truong2016-05-16
| | | | | | | | | | SMMU SIDs allocated for PCIe varies across chipsets. Thus, add support to retrieve the base SID from PCIe devicetree node so that PCIe bus driver can use it to calculate and assign to each PCI device. Change-Id: I7651f2cbc53587f5b48501855260c87af2a2db01 Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add support to get PCIe PHY init sequence from DTTony Truong2016-05-16
| | | | | | | | | PCIe PHY varies between each chipset. Thus, the PHY init sequence on each of these chipsets are also different. Therefore, add the support to read PCIe PHY init sequence from devicetree. Change-Id: I21c2ce2b7d3bf1541a5d3580db4bc40497701095 Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add support to modify the Cpl timeout for RCTony Truong2016-03-23
| | | | | | | | | | Add support to modify the completion timeout range for the root complex. This value/range will inform when the root complex should send out a completion if the endpoint does not respond. Change-Id: Iabca3f637d9abf6c93810c84d81ff6b5c77d4528 Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: ep_pcie: add the support of MDM2AP GPIOYan He2016-03-23
| | | | | | | | Add the support of MDM2AP GPIO so that MDM can notify AP about updated status. Change-Id: Ia5a020898d4d04dcd4fec6b3928aba380663ac56 Signed-off-by: Yan He <yanhe@codeaurora.org>
* msm: ep_pcie: add the support of PCIe EP mode for mdmcaliforniumYan He2016-03-22
| | | | | | | Add the support of PCIe Endpoint (EP) mode for mdmcalifornium. Change-Id: I55c85813e674810d865b444b7e19ce4157cea479 Signed-off-by: Yan He <yanhe@codeaurora.org>
* msm: ep_pcie: add PCIe endpoint driverYan He2016-03-22
| | | | | | | | | The MSM PCIe endpoint driver enables the PCIe core in endpoint mode and handles the control signaling with PCIe root complex on host side. Change-Id: Ifc2735e061820762c6040eda44089a2dc26fc065 Signed-off-by: Yan He <yanhe@codeaurora.org>
* msm: pcie: add QSERDES PHY support for mdmcaliforniumTony Truong2016-03-22
| | | | | | | | | | The current PHY sequence is not fully compatible with the QSERDES PHY found on mdmcalifornium. Thus, add the new sequence and other changes to support PCIe QSERDES PHY on mdmcalifornium. Change-Id: I5a5d0b115651a159612e17debf0d25d6f88dbee8 Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add support to distingush between PCIe PHY verTony Truong2016-03-22
| | | | | | | | | PCIe bus driver can now use devicetree to help distingush which PCIe QMP PHY version is being used. This will allow PCIe bus driver to choose the correct PCIe PHY sequence. Change-Id: I74c67431b75292bb1db3e4b97d89d69de9b6f11b Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add PCIe support for 3.18 kernelTony Truong2016-03-22
| | | | | | | | Add PCIe support for 3.18 kernel. Added enumeration, interrupts, and hardware configurations support for PCIe. Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add SMMU support to calculate SID for PCIe EPTony Truong2016-03-22
| | | | | | | | | | SMMU requires PCIe to provide a SID for each of its endpoint so that the endpoint can successful transaction on the bus. This change adds the support for PCIe bus driver to calculate a SID for its endpoint and give it to the SMMU driver. Change-Id: I52099bbfed0a38c75b0277b0f58f45f6e6559695 Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add support to enable additional GPIO for endpointTony Truong2016-03-22
| | | | | | | | Some EP requires additional GPIO to be enabled for link training. Add the support in PCIe Bus Driver to manage this GPIO. Change-Id: I837edae478779fdaf3e94c70a0a031f9d0580a77 Signed-off-by: Tony Truong <truong@codeaurora.org>
* Documentation: devicetree: add iommus entry for PCIeTony Truong2016-03-22
| | | | | | | | | PCIe on some targets require the iommus device tree entry. Therefore, add this device tree entry to the PCIe documentation. Change-Id: Iec6c4cfcd5e51d6aa1259bb826fe60d131072170 Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add PCIe MSI support on 3.14 kernelTony Truong2016-03-22
| | | | | | | | | | | | To support PCIe MSI on 3.14 kernel, the client's host driver must use the QGIC IRQ number to request/enable the interrupt while the client's firmware must use the SPI number to trigger the interrupt. Therefore, add this logic in PCIe bus driver to support MSI interrupts on 3.14 kernel. Change-Id: I165022281c9e795be8c5e2e4a4faa34d4c004a45 Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add PCIe support for thuliumTony Truong2016-03-22
| | | | | | | | | Add PCIe support for thulium. Added enumeration, interrupts, and hardware configurations support for PCIe. Change-Id: I48b2fc8a51303a6aea7b1b2a97c4de25f19ded4c Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add support to enable clk power management for EPTony Truong2016-03-22
| | | | | | | | Add support to enable the clock power management for the endpoint. Change-Id: I02bebfeb5d32eb8e1f75ee5feb4c4fff956ece66 Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add support to enable common clk config for EPTony Truong2016-03-22
| | | | | | | | Add support to enable the common clock configuration for the endpoint. Change-Id: I9f6c33eb6cfa032837a07e437f349a7c1a60704c Signed-off-by: Tony Truong <truong@codeaurora.org>
* msm: pcie: add PCIe bus driver snapshotTony Truong2016-03-22
| | | | | | | | | | | | This PCIe bus driver snapshot is taken as of msm-3.10 commit: 803998b (Merge "ASoC: wcd: don't set autozeroing for conga") This change adds the PCIe bus driver and its dependecies from msm-3.10 to msm-3.14. All the files are as is from msm-3.10. No additional changes were made. Change-Id: Ia1a2d0eea0cc87c16357c95bfcc4df72e910cd34 Signed-off-by: Tony Truong <truong@codeaurora.org>
* Merge tag 'armsoc-dt' of ↵Linus Torvalds2015-11-10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "As usual, this is the massive branch we have for each release. Lots of various updates and additions of hardware descriptions on existing hardware, as well as the usual additions of new boards and SoCs. This is also the first release where we've started mixing 64- and 32-bit DT updates in one branch. (Specific details on what's actually here and new is pretty easy to tell from the diffstat, so there's little point in duplicating listing it here)" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits) ARM: dts: uniphier: add system-bus-controller nodes ARM64: juno: disable NOR flash node by default ARM: dts: uniphier: add outer cache controller nodes arm64: defconfig: Enable PCI generic host bridge by default arm64: Juno: Add support for the PCIe host bridge on Juno R1 Documentation: of: Document the bindings used by Juno R1 PCIe host bridge ARM: dts: uniphier: add I2C aliases for ProXstream2 boards dts/Makefile: Add build support for LS2080a QDS & RDB board DTS dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards dts/ls2080a: Update Simulator DTS to add support of various peripherals dts/ls2080a: Remove text about writing to Free Software Foundation dts/ls2080a: Update DTSI to add support of various peripherals doc: DTS: Update DWC3 binding to provide reference to generic bindings doc/bindings: Update GPIO devicetree binding documentation for LS2080A Documentation/dts: Move FSL board-specific bindings out of /powerpc Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards arm64: Rename FSL LS2085A SoC support code to LS2080A arm64: Use generic Layerscape SoC family naming ARM: dts: uniphier: add ProXstream2 Vodka board support ARM: dts: uniphier: add ProXstream2 Gentil board support ...
| * Documentation: of: Document the bindings used by Juno R1 PCIe host bridgeLiviu Dudau2015-10-26
| | | | | | | | | | | | | | | | | | ARM's Juno R1 board used PLDA XpressRICH3-AXI IP to implement a PCIe host bridge. Introduce "plda" as vendor prefix for PLDA and document the DT bindings for PLDA XpressRICH3-AXI IP as well as ARM's Juno R1. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com>
* | Merge tag 'devicetree-for-4.4' of ↵Linus Torvalds2015-11-06
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: "A fairly large (by DT standards) pull request this time with the majority being some overdue moving DT binding docs around to consolidate similar bindings. - DT binding doc consolidation moving similar bindings to common locations. The majority of these are display related which were scattered in video/, fb/, drm/, gpu/, and panel/ directories. - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all dtbs in the tree for most arches with dts files (except powerpc for now). - OF_IRQ=n fixes for user enabled CONFIG_OF. - of_node_put ref counting fixes from Julia Lawall. - Common DT binding for wakeup-source and deprecation of all similar bindings. - DT binding for PXA LCD controller. - Allow ignoring failed PCI resource translations in order to ignore 64-bit addresses on non-LPAE 32-bit kernels. - Support setting the NUMA node from DT instead of only from parent device. - Couple of earlycon DT parsing fixes for address and options" * tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (45 commits) MAINTAINERS: update DT binding doc locations devicetree: add Sigma Designs vendor prefix of: simplify arch_find_n_match_cpu_physical_id() function Documentation: arm: Fixed typo in socfpga fpga mgr example Documentation: devicetree: fix reference to legacy wakeup properties Documentation: devicetree: standardize/consolidate on "wakeup-source" property drivers: of: removing assignment of 0 to static variable xtensa: enable building of all dtbs mips: enable building of all dtbs metag: enable building of all dtbs metag: use common make variables for dtb builds h8300: enable building of all dtbs arm64: enable building of all dtbs arm: enable building of all dtbs arc: enable building of all dtbs arc: use common make variables for dtb builds of: add config option to enable building of all dtbs of/fdt: fix error checking for earlycon address of/overlay: add missing of_node_put of/platform: add missing of_node_put ...
| * | Documentation/devicetree: Update PCI Device Tree bindingsBjorn Helgaas2015-10-22
| |/ | | | | | | | | | | | | Update broken links to PCI bus and interrupt mapping bindings. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rob Herring <robh@kernel.org>
* | Merge tag 'pci-v4.4-changes' of ↵Linus Torvalds2015-11-06
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Resource management: - Add support for Enhanced Allocation devices (Sean O. Stalley) - Add Enhanced Allocation register entries (Sean O. Stalley) - Handle IORESOURCE_PCI_FIXED when sizing resources (David Daney) - Handle IORESOURCE_PCI_FIXED when assigning resources (David Daney) - Handle Enhanced Allocation capability for SR-IOV devices (David Daney) - Clear IORESOURCE_UNSET when reverting to firmware-assigned address (Bjorn Helgaas) - Make Enhanced Allocation bitmasks more obvious (Bjorn Helgaas) - Expand Enhanced Allocation BAR output (Bjorn Helgaas) - Add of_pci_check_probe_only to parse "linux,pci-probe-only" (Marc Zyngier) - Fix lookup of linux,pci-probe-only property (Marc Zyngier) - Add sparc mem64 resource parsing for root bus (Yinghai Lu) PCI device hotplug: - pciehp: Queue power work requests in dedicated function (Guenter Roeck) Driver binding: - Add builtin_pci_driver() to avoid registration boilerplate (Paul Gortmaker) Virtualization: - Set SR-IOV NumVFs to zero after enumeration (Alexander Duyck) - Remove redundant validation of SR-IOV offset/stride registers (Alexander Duyck) - Remove VFs in reverse order if virtfn_add() fails (Alexander Duyck) - Reorder pcibios_sriov_disable() (Alexander Duyck) - Wait 1 second between disabling VFs and clearing NumVFs (Alexander Duyck) - Fix sriov_enable() error path for pcibios_enable_sriov() failures (Alexander Duyck) - Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs (Ben Shelton) - Don't try to restore VF BARs (Wei Yang) MSI: - Don't alloc pcibios-irq when MSI is enabled (Joerg Roedel) - Add msi_controller setup_irqs() method for special multivector setup (Lucas Stach) - Export all remapped MSIs to sysfs attributes (Romain Bezut) - Disable MSI on SiS 761 (Ondrej Zary) AER: - Clear error status registers during enumeration and restore (Taku Izumi) Generic host bridge driver: - Fix lookup of linux,pci-probe-only property (Marc Zyngier) - Allow multiple hosts with different map_bus() methods (David Daney) - Pass starting bus number to pci_scan_root_bus() (David Daney) - Fix address window calculation for non-zero starting bus (David Daney) Altera host bridge driver: - Add msi.h to ARM Kbuild (Ley Foon Tan) - Add Altera PCIe host controller driver (Ley Foon Tan) - Add Altera PCIe MSI driver (Ley Foon Tan) APM X-Gene host bridge driver: - Remove msi_controller assignment (Duc Dang) Broadcom iProc host bridge driver: - Fix header comment "Corporation" misspelling (Florian Fainelli) - Fix code comment to match code (Ray Jui) - Remove unused struct iproc_pcie.irqs[] (Ray Jui) - Call pci_fixup_irqs() for ARM64 as well as ARM (Ray Jui) - Fix PCIe reset logic (Ray Jui) - Improve link detection logic (Ray Jui) - Update PCIe device tree bindings (Ray Jui) - Add outbound mapping support (Ray Jui) Freescale i.MX6 host bridge driver: - Return real error code from imx6_add_pcie_port() (Fabio Estevam) - Add PCIE_PHY_RX_ASIC_OUT_VALID definition (Fabio Estevam) Freescale Layerscape host bridge driver: - Remove ls_pcie_establish_link() (Minghuan Lian) - Ignore PCIe controllers in Endpoint mode (Minghuan Lian) - Factor out SCFG related function (Minghuan Lian) - Update ls_add_pcie_port() (Minghuan Lian) - Remove unused fields from struct ls_pcie (Minghuan Lian) - Add support for LS1043a and LS2080a (Minghuan Lian) - Add ls_pcie_msi_host_init() (Minghuan Lian) HiSilicon host bridge driver: - Add HiSilicon SoC Hip05 PCIe driver (Zhou Wang) Marvell MVEBU host bridge driver: - Return zero for reserved or unimplemented config space (Russell King) - Use exact config access size; don't read/modify/write (Russell King) - Use of_get_available_child_count() (Russell King) - Use for_each_available_child_of_node() to walk child nodes (Russell King) - Report full node name when reporting a DT error (Russell King) - Use port->name rather than "PCIe%d.%d" (Russell King) - Move port parsing and resource claiming to separate function (Russell King) - Fix memory leaks and refcount leaks (Russell King) - Split port parsing and resource claiming from port setup (Russell King) - Use gpio_set_value_cansleep() (Russell King) - Use devm_kcalloc() to allocate an array (Russell King) - Use gpio_desc to carry around gpio (Russell King) - Improve clock/reset handling (Russell King) - Add PCI Express root complex capability block (Russell King) - Remove code restricting accesses to slot 0 (Russell King) NVIDIA Tegra host bridge driver: - Wrap static pgprot_t initializer with __pgprot() (Ard Biesheuvel) Renesas R-Car host bridge driver: - Build pci-rcar-gen2.c only on ARM (Geert Uytterhoeven) - Build pcie-rcar.c only on ARM (Geert Uytterhoeven) - Make PCI aware of the I/O resources (Phil Edworthy) - Remove dependency on ARM-specific struct hw_pci (Phil Edworthy) - Set root bus nr to that provided in DT (Phil Edworthy) - Fix I/O offset for multiple host bridges (Phil Edworthy) ST Microelectronics SPEAr13xx host bridge driver: - Fix dw_pcie_cfg_read/write() usage (Gabriele Paoloni) Synopsys DesignWare host bridge driver: - Make "clocks" and "clock-names" optional DT properties (Bhupesh Sharma) - Use exact access size in dw_pcie_cfg_read() (Gabriele Paoloni) - Simplify dw_pcie_cfg_read/write() interfaces (Gabriele Paoloni) - Require config accesses to be naturally aligned (Gabriele Paoloni) - Make "num-lanes" an optional DT property (Gabriele Paoloni) - Move calculation of bus addresses to DRA7xx (Gabriele Paoloni) - Replace ARM pci_sys_data->align_resource with global function pointer (Gabriele Paoloni) - Factor out MSI msg setup (Lucas Stach) - Implement multivector MSI IRQ setup (Lucas Stach) - Make get_msi_addr() return phys_addr_t, not u32 (Lucas Stach) - Set up high part of MSI target address (Lucas Stach) - Fix PORT_LOGIC_LINK_WIDTH_MASK (Zhou Wang) - Revert "PCI: designware: Program ATU with untranslated address" (Zhou Wang) - Use of_pci_get_host_bridge_resources() to parse DT (Zhou Wang) - Make driver arch-agnostic (Zhou Wang) Miscellaneous: - Make x86 pci_subsys_init() static (Alexander Kuleshov) - Turn off Request Attributes to avoid Chelsio T5 Completion erratum (Hariprasad Shenai)" * tag 'pci-v4.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (94 commits) PCI: altera: Add Altera PCIe MSI driver PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver PCI: layerscape: Add ls_pcie_msi_host_init() PCI: layerscape: Add support for LS1043a and LS2080a PCI: layerscape: Remove unused fields from struct ls_pcie PCI: layerscape: Update ls_add_pcie_port() PCI: layerscape: Factor out SCFG related function PCI: layerscape: Ignore PCIe controllers in Endpoint mode PCI: layerscape: Remove ls_pcie_establish_link() PCI: designware: Make "clocks" and "clock-names" optional DT properties PCI: designware: Make driver arch-agnostic ARM/PCI: Replace pci_sys_data->align_resource with global function pointer PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT Revert "PCI: designware: Program ATU with untranslated address" PCI: designware: Move calculation of bus addresses to DRA7xx PCI: designware: Make "num-lanes" an optional DT property PCI: designware: Require config accesses to be naturally aligned PCI: designware: Simplify dw_pcie_cfg_read/write() interfaces PCI: designware: Use exact access size in dw_pcie_cfg_read() PCI: spear: Fix dw_pcie_cfg_read/write() usage ...
| * \ Merge branch 'pci/host-layerscape' into nextBjorn Helgaas2015-11-03
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/host-layerscape: PCI: layerscape: Add ls_pcie_msi_host_init() PCI: layerscape: Add support for LS1043a and LS2080a PCI: layerscape: Remove unused fields from struct ls_pcie PCI: layerscape: Update ls_add_pcie_port() PCI: layerscape: Factor out SCFG related function PCI: layerscape: Ignore PCIe controllers in Endpoint mode PCI: layerscape: Remove ls_pcie_establish_link()
| | * | PCI: layerscape: Add support for LS1043a and LS2080aMinghuan Lian2015-11-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both LS1043a and LS2080a are based on ARMv8 64-bit architecture and have similar PCIe implementation. LUT is added to controller. Add LS1043a and LS2080a support. [bhelgaas: move unused field removal into separate patch, include DT update] Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> (DT update) Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> (DT update)
| * | | Merge branch 'pci/host-hisi' into nextBjorn Helgaas2015-11-03
| |\ \ \ | | | | | | | | | | | | | | | | | | | | * pci/host-hisi: PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver
| | * | | PCI: hisi: Add HiSilicon SoC Hip05 PCIe driverZhou Wang2015-11-02
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PCIe host support for HiSilicon SoC Hip05, related DT binding documentation, and maintainer update. [bhelgaas: changelog, 32-bit only config write warning text] Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: liudongdong <liudongdong3@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> (DT binding)
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| *-----. \ \ Merge branches 'pci/host-altera', 'pci/host-designware', 'pci/host-generic', ↵Bjorn Helgaas2015-11-03
| |\ \ \ \ \ \ | | | | |_|/ / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pci/host-imx6', 'pci/host-iproc', 'pci/host-mvebu', 'pci/host-rcar', 'pci/host-tegra' and 'pci/host-xgene' into next * pci/host-altera: PCI: altera: Add Altera PCIe MSI driver PCI: altera: Add Altera PCIe host controller driver ARM: Add msi.h to Kbuild * pci/host-designware: PCI: designware: Make "clocks" and "clock-names" optional DT properties PCI: designware: Make driver arch-agnostic ARM/PCI: Replace pci_sys_data->align_resource with global function pointer PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT Revert "PCI: designware: Program ATU with untranslated address" PCI: designware: Move calculation of bus addresses to DRA7xx PCI: designware: Make "num-lanes" an optional DT property PCI: designware: Require config accesses to be naturally aligned PCI: designware: Simplify dw_pcie_cfg_read/write() interfaces PCI: designware: Use exact access size in dw_pcie_cfg_read() PCI: spear: Fix dw_pcie_cfg_read/write() usage PCI: designware: Set up high part of MSI target address PCI: designware: Make get_msi_addr() return phys_addr_t, not u32 PCI: designware: Implement multivector MSI IRQ setup PCI: designware: Factor out MSI msg setup PCI: Add msi_controller setup_irqs() method for special multivector setup PCI: designware: Fix PORT_LOGIC_LINK_WIDTH_MASK * pci/host-generic: PCI: generic: Fix address window calculation for non-zero starting bus PCI: generic: Pass starting bus number to pci_scan_root_bus() PCI: generic: Allow multiple hosts with different map_bus() methods arm64: dts: Drop linux,pci-probe-only from the Seattle DTS powerpc/PCI: Fix lookup of linux,pci-probe-only property PCI: generic: Fix lookup of linux,pci-probe-only property of/pci: Add of_pci_check_probe_only to parse "linux,pci-probe-only" * pci/host-imx6: PCI: imx6: Add PCIE_PHY_RX_ASIC_OUT_VALID definition PCI: imx6: Return real error code from imx6_add_pcie_port() * pci/host-iproc: PCI: iproc: Fix header comment "Corporation" misspelling PCI: iproc: Add outbound mapping support PCI: iproc: Update PCIe device tree bindings PCI: iproc: Improve link detection logic PCI: iproc: Fix PCIe reset logic PCI: iproc: Call pci_fixup_irqs() for ARM64 as well as ARM PCI: iproc: Remove unused struct iproc_pcie.irqs[] PCI: iproc: Fix code comment to match code * pci/host-mvebu: PCI: mvebu: Remove code restricting accesses to slot 0 PCI: mvebu: Add PCI Express root complex capability block PCI: mvebu: Improve clock/reset handling PCI: mvebu: Use gpio_desc to carry around gpio PCI: mvebu: Use devm_kcalloc() to allocate an array PCI: mvebu: Use gpio_set_value_cansleep() PCI: mvebu: Split port parsing and resource claiming from port setup PCI: mvebu: Fix memory leaks and refcount leaks PCI: mvebu: Move port parsing and resource claiming to separate function PCI: mvebu: Use port->name rather than "PCIe%d.%d" PCI: mvebu: Report full node name when reporting a DT error PCI: mvebu: Use for_each_available_child_of_node() to walk child nodes PCI: mvebu: Use of_get_available_child_count() PCI: mvebu: Use exact config access size; don't read/modify/write PCI: mvebu: Return zero for reserved or unimplemented config space * pci/host-rcar: PCI: rcar: Fix I/O offset for multiple host bridges PCI: rcar: Set root bus nr to that provided in DT PCI: rcar: Remove dependency on ARM-specific struct hw_pci PCI: rcar: Make PCI aware of the I/O resources PCI: rcar: Build pcie-rcar.c only on ARM PCI: rcar: Build pci-rcar-gen2.c only on ARM * pci/host-tegra: PCI: tegra: Wrap static pgprot_t initializer with __pgprot() * pci/host-xgene: PCI/MSI: xgene: Remove msi_controller assignment
| | | | | * | PCI: iproc: Update PCIe device tree bindingsRay Jui2015-09-25
| | |_|_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the device tree bindings with added support for outbound mapping configurations. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | | | * | PCI: generic: Fix address window calculation for non-zero starting busDavid Daney2015-10-09
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the offset from the beginning of the "reg" property be from the starting bus number, rather than zero. Hoist the invariant size calculation out of the mapping for loop. Update host-generic-pci.txt to clarify the semantics of the "reg" property with respect to non-zero starting bus numbers. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Rob Herring <robh@kernel.org>
| | | * | PCI: designware: Make "clocks" and "clock-names" optional DT propertiesBhupesh Sharma2015-11-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the clock-related properties in the DesignWare PCIe controller bindings to 'optional' set of properties. [bhelgaas: move to separate patch] Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
| | | * | PCI: designware: Make "num-lanes" an optional DT propertyGabriele Paoloni2015-11-02
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently "num-lanes" is read in dw_pcie_host_init(), but it is only used if we call dw_pcie_setup_rc() while bringing up the link. If the link has already been brought up by firmware, we need not call dw_pcie_setup_rc(), and "num-lanes" is unnecessary. Only complain about "num-lanes" if we actually need it and we didn't find a valid value. [bhelgaas: changelog] Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: altera: Add Altera PCIe MSI driverLey Foon Tan2015-11-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Altera PCIe MSI driver. This soft IP supports a configurable number of vectors, which is a DTS parameter. [bhelgaas: Kconfig depend on PCIE_ALTERA, typos, whitespace] Signed-off-by: Ley Foon Tan <lftan@altera.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org>
| | * | PCI: altera: Add Altera PCIe host controller driverLey Foon Tan2015-10-23
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the Altera PCIe host controller driver. [bhelgaas: whitespace, fold in DT and maintainer updates, OF_PCI dependency from Arnd] Signed-off-by: Ley Foon Tan <lftan@altera.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org> (DT binding)
* | / Docs: dt: Add PCI MSI map bindingsMark Rutland2015-10-16
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently msi-parent is used by a few bindings to describe the relationship between a PCI root complex and a single MSI controller, but this property does not have a generic binding document. Additionally, msi-parent is insufficient to describe more complex relationships between MSI controllers and devices under a root complex, where devices may be able to target multiple MSI controllers, or where MSI controllers use (non-probeable) sideband information to distinguish devices. This patch adds a generic binding for mapping PCI devices to MSI controllers. This document covers msi-parent, and a new msi-map property (specific to PCI*) which may be used to map devices (identified by their Requester ID) to sideband data for each MSI controller that they may target. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* | PCI: rcar: Add R8A7794 supportSergei Shtylyov2015-09-24
|/ | | | | | | Add Renesas R8A7794 SoC support to the Renesas R-Car gen2 PCI driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org> Acked-by: Simon Horman <horms+renesas@verge.net.au>
* PCI: dra7xx: Add support to make GPIO drive PERST# lineKishon Vijay Abraham I2015-08-11
| | | | | | | | | | The PERST# line in am57x-evm is connected to a GPIO line and PERST# should be driven high to indicate the clocks are stable (As per Figure 2-10: Power Up of the PCIe CEM spec 3.0). Add support to make GPIO drive PERST# line. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* Merge tag 'armsoc-dt' of ↵Linus Torvalds2015-06-26
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Kevin Hilman: "As usual, quite a few device-tree updates in ARM land. There was one minor churn in DTs due to relicensing under a dual-license, and lots of little additions of new peripherals, features etc, but nothing really exciting to call to your attention. Some higlights, focsuing on support for new SoCs and boards: - AT91: new boards: Overkiz, Acme Systems' Arietta G25 - tegra: HDA support - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys boards, DLink DNS-327L - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50 - ARM: added support for Juno r1 board - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6, Gateworks GW5510, and aristainetos2 boards - hisilicon: hi6220 SoC support; new boards: 96boards hikey" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits) ARM: hisi: revert changes from hisi/hip04-dt branch ARM: nomadik: set proper compatible for accelerometer ARM64: juno: add GPIO keys ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes ARM: dts: Introduce STM32F429 MCU ARM: socfpga: dts: enable ethernet for Arria10 devkit ARM: dts: k2l: fix the netcp range size ARM: dts: k2e: fix the netcp range size ARM: dts: k2hk: fix the netcp range size ARM: dts: k2l-evm: Add device bindings for netcp driver ARM: dts: k2e-evm: Add device bindings for netcp driver ARM: dts: k2hk-evm: Add device bindings for netcp driver ARM: BCM5301X: Add DT for Asus RT-AC87U ARM: BCM5301X: add IRQ numbers for PCIe controller ARM: BCM5301X: add NAND flash chip description arm64: dts: Add dts files for Hisilicon Hi6220 SoC clk: hi6220: Document devicetree bindings for hi6220 clock arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC ARM: at91/dt: sama5d4ek: mci0 uses slot 0 ARM: at91/dt: kizbox: fix mismatch LED PWM device ...
| * PCI: xilinx: Trivial fix in DT exampleMichal Simek2015-05-28
| | | | | | | | | | | | | | Good to have it properly describe for c&p cases. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Mark Rutland <mark.rutland@arm.com>
* | PCI: xgene: Add APM X-Gene v1 PCIe MSI/MSIX termination driverDuc Dang2015-06-05
|/ | | | | | | | | | | | | | | | | | | | | APM X-Gene v1 SoC supports its own implementation of MSI, which is not compliant to GIC V2M specification for MSI Termination. There is a single MSI block in X-Gene v1 SOC which serves all 5 PCIe ports. This MSI block supports 2048 MSI termination ports coalesced into 16 physical HW IRQ lines and shared across all 5 PCIe ports. As there are only 16 HW IRQs to serve 2048 MSI vectors, to support set_affinity correctly for each MSI vectors, the 16 HW IRQs are statically allocated to 8 X-Gene v1 cores (2 HW IRQs for each cores). To steer MSI interrupt to target CPU, MSI vector is moved around these HW IRQs lines. With this approach, the total MSI vectors this driver supports is reduced to 256. [bhelgaas: squash doc, driver, maintainer update] Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
* PCI: iproc: Add DT docs for Broadcom iProc PCIe driverRay Jui2015-04-08
| | | | | | | | Document the Broadcom iProc PCIe platform interface device tree binding. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'devicetree-for-3.20' of ↵Linus Torvalds2015-02-12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree changes from Rob Herring: - DT unittests for I2C probing and overlays from Pantelis Antoniou - Remove DT unittest dependency on OF_DYNAMIC from Gaurav Minocha - Add Tegra compatible strings missing for newer parts from Paul Walmsley - Various vendor prefix additions * tag 'devicetree-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: of: Add vendor prefix for OmniVision Technologies of: Use ovti for Omnivision of: Add vendor prefix for Truly Semiconductors Limited of: Add vendor prefix for Himax Technologies Inc. of/fdt: fix sparse warning of: unitest: Add I2C overlay unit tests. Documentation: DT: document compatible string existence requirement Documentation: DT bindings: add nvidia, tegra132-denver compatible string Documentation: DT bindings: add more Tegra chip compatible strings of: EXPORT_SYMBOL_GPL of_property_read_u64_array of: Fix brace position for struct of_device_id definition of/unittest: Remove obsolete code dt-bindings: use isil prefix for Intersil in vendor-prefixes.txt Add AD Holdings Plc. to vendor-prefixes. dt-bindings: Add Silicon Mitus vendor prefix Removes OF_UNITTEST dependency on OF_DYNAMIC config symbol pinctrl: fix up device tree bindings DT: Vendors: Add Everspin doc: add bindings document for altera fpga manager drivers: of: Export of_reserved_mem_device_{init,release}
| * Documentation: DT bindings: add more Tegra chip compatible stringsPaul Walmsley2015-02-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Align compatible strings for several IP blocks present on Tegra chips with the latest doctrine from the DT maintainers: http://marc.info/?l=devicetree&m=142255654213019&w=2 The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 DT binding text files have been updated for the following IP blocks: - PCIe - SOR - SoC timers - AHB "gizmo" - APB_MISC - pinmux control - UART - PWM - I2C - SPI - RTC - PMC - eFuse - AHCI - HDA - XUSB_PADCTRL - SDHCI - SOC_THERM - AHUB - I2S - EHCI - USB PHY N.B. The nvidia,tegra20-timer compatible string is removed from the nvidia,tegra30-timer.txt documentation file because it's already mentioned in the nvidia,tegra20-timer.txt documentation file. This second version takes into account the following requests from Rob Herring <robherring2@gmail.com>: - Per-IP block patches have been combined into a single patch - Explicit documentation about which compatible strings are actually matched by the driver has been removed. In its place is implicit documentation that loosely follows Rob's prescribed format: "Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where <chip> is tegra30, tegra132, ..." [...] "You should attempt to document known values of <chip> if you use it" Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Dylan Reid <dgreid@chromium.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Jingchang Lu <jingchang.lu@freescale.com> Cc: John Crispin <blogic@openwrt.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mikko Perttunen <mperttunen@nvidia.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Takashi Iwai <tiwai@suse.de> Cc: Tejun Heo <tj@kernel.org> Cc: "Terje Bergström" <tbergstrom@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Zhang Rui <rui.zhang@intel.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-i2c@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-pwm@vger.kernel.org Cc: linux-tegra@vger.kernel.org Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
* | PCI: versatile: Add DT docs for ARM Versatile PB PCIe driverRob Herring2015-01-28
|/ | | | | | | | | | | | Add binding documentation for the PCI controller found on Versatile PB boards. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> CC: Pawel Moll <pawel.moll@arm.com> CC: Mark Rutland <mark.rutland@arm.com> CC: Ian Campbell <ijc+devicetree@hellion.org.uk> CC: Kumar Gala <galak@codeaurora.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-06-23 02:27:40 +0000