android_kernel_zuk_msm8996.git

	Commit message (Expand)	Author	Age
*	clk: sunxi: Add apb0 gates for H3	Krzysztof Adamski	2017-05-02
*	clk: sunxi: Add support for the usb-clk on sun8i a23 and a33 SoCs	Hans de Goede	2015-06-02
*	clk: sunxi: Add muxable ahb factors clock for sun5i and sun7i	Chen-Yu Tsai	2015-03-21
*	clk: sunxi: Add support for sun9i A80 USB clocks and resets	Chen-Yu Tsai	2015-02-23
*	clk: sunxi: Add driver for A80 MMC config clocks/resets	Chen-Yu Tsai	2015-01-20
*	clk: sunxi: Add mod0 and mmc module clock support for A80	Chen-Yu Tsai	2015-01-19
*	clk: sunxi: Rework MMC phase clocks	Maxime Ripard	2015-01-14
*	clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider	Chen-Yu Tsai	2014-12-21
*	clk: sunxi: Implement A31 PLL6 as a divs clock for 2x output	Chen-Yu Tsai	2014-11-23
*	clk: sunxi: Removed unused/incorrect sun6i-a31-apb2-clk driver	Chen-Yu Tsai	2014-11-23
*	clk: sunxi: unify APB1 clock	Emilio López	2014-11-11
*	clk: sunxi: Add support for bus clock gates on Allwinner A80 SoC	Chen-Yu Tsai	2014-10-21
*	clk: sunxi: Add support for A80 basic bus clocks	Chen-Yu Tsai	2014-10-21
*	clk: sunxi: Add sun8i MBUS clock support	Chen-Yu Tsai	2014-09-27
*	clk: sunxi: mod0: Introduce MMC proper phase handling	Maxime Ripard	2014-09-27
*	clk: sunxi: Introduce mbus compatible	Maxime Ripard	2014-09-27
*	clk: sunxi: sun6i-a31-apb0-gates: Add A23 APB0 support	Chen-Yu Tsai	2014-07-15
*	clk: sunxi: Add A23 APB0 divider clock support	Chen-Yu Tsai	2014-07-07
*	clk: sunxi: Add A23 clocks support	Chen-Yu Tsai	2014-07-04
*	clk: sunxi: document PRCM clock compatible strings	Boris BREZILLON	2014-06-11
*	clk: sunxi: document new A31 USB clock compatible	Emilio López	2014-06-11
*	clk: sunxi: Add new clock compatibles	Maxime Ripard	2014-02-18
*	clk: sunxi: Add Allwinner A20/A31 GMAC clock unit	Chen-Yu Tsai	2014-02-18
*	clk: sunxi: Add support for PLL6 on the A31	Maxime Ripard	2014-02-18
*	clk: sunxi: Add USB clock register defintions	Roman Byshko	2014-02-18
*	clk: sunxi: update clock-output-names dt binding documentation	Chen-Yu Tsai	2014-02-03
*	clk: sunxi: Allwinner A20 output clock support	Chen-Yu Tsai	2013-12-28
*	clk: sunxi: mod0 support	Emilio López	2013-12-28
*	clk: sunxi: add PLL5 and PLL6 support	Emilio López	2013-12-28
*	clk: sunxi: add gating support to PLL1	Emilio López	2013-12-28
*	Documentation: dt: Remove clock gates IDs list for Allwinner SoCs	Maxime Ripard	2013-10-11
*	clk: sunxi: Add Allwinner A20 gates	Maxime Ripard	2013-08-26
*	clk: sunxi: Add A31 clocks support	Maxime Ripard	2013-08-26
*	clk: sunxi: Add A10s gates	Maxime Ripard	2013-08-26
*	clk: sun5i: Add compatibles for Allwinner A13	Maxime Ripard	2013-05-28
*	clk: sunxi: Add support for AXI, AHB, APB0 and APB1 gates	Emilio López	2013-04-04
*	clk: sunxi: rename compatible strings	Emilio López	2013-03-27
*	clk: arm: sunxi: Add a new clock driver for sunxi SOCs	Emilio López	2013-03-27