diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/batterydata-lib.h | 218 | ||||
| -rw-r--r-- | include/linux/leds-qpnp-wled.h | 22 | ||||
| -rw-r--r-- | include/linux/msm_bcl.h | 104 | ||||
| -rw-r--r-- | include/linux/of_batterydata.h | 67 | ||||
| -rw-r--r-- | include/linux/power/qcom/apm.h | 48 | ||||
| -rw-r--r-- | include/linux/power_supply.h | 69 | ||||
| -rw-r--r-- | include/linux/qpnp/pin.h | 226 | ||||
| -rw-r--r-- | include/linux/qpnp/power-on.h | 96 | ||||
| -rw-r--r-- | include/linux/qpnp/qpnp-adc.h | 2268 | ||||
| -rw-r--r-- | include/linux/qpnp/qpnp-haptic.h | 23 | ||||
| -rw-r--r-- | include/linux/qpnp/qpnp-revid.h | 176 | ||||
| -rw-r--r-- | include/linux/regulator/kryo-regulator.h | 32 | ||||
| -rw-r--r-- | include/linux/regulator/proxy-consumer.h | 41 | ||||
| -rw-r--r-- | include/linux/regulator/qpnp-regulator.h | 197 | ||||
| -rw-r--r-- | include/linux/regulator/rpm-smd-regulator.h | 132 | ||||
| -rw-r--r-- | include/linux/regulator/spm-regulator.h | 25 | ||||
| -rw-r--r-- | include/soc/qcom/spm.h | 148 | ||||
| -rw-r--r-- | include/trace/trace_thermal.h | 399 |
18 files changed, 4291 insertions, 0 deletions
diff --git a/include/linux/batterydata-lib.h b/include/linux/batterydata-lib.h new file mode 100644 index 000000000000..39517f83c875 --- /dev/null +++ b/include/linux/batterydata-lib.h @@ -0,0 +1,218 @@ +/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __BMS_BATTERYDATA_H +#define __BMS_BATTERYDATA_H + +#include <linux/errno.h> + +#define FCC_CC_COLS 5 +#define FCC_TEMP_COLS 8 + +#define PC_CC_ROWS 31 +#define PC_CC_COLS 13 + +#define PC_TEMP_ROWS 31 +#define PC_TEMP_COLS 8 + +#define ACC_IBAT_ROWS 4 +#define ACC_TEMP_COLS 3 + +#define MAX_SINGLE_LUT_COLS 20 + +#define MAX_BATT_ID_NUM 4 +#define DEGC_SCALE 10 + +struct single_row_lut { + int x[MAX_SINGLE_LUT_COLS]; + int y[MAX_SINGLE_LUT_COLS]; + int cols; +}; + +/** + * struct sf_lut - + * @rows: number of percent charge entries should be <= PC_CC_ROWS + * @cols: number of charge cycle entries should be <= PC_CC_COLS + * @row_entries: the charge cycles/temperature at which sf data + * is available in the table. + * The charge cycles must be in increasing order from 0 to rows. + * @percent: the percent charge at which sf data is available in the table + * The percentcharge must be in decreasing order from 0 to cols. + * @sf: the scaling factor data + */ +struct sf_lut { + int rows; + int cols; + int row_entries[PC_CC_COLS]; + int percent[PC_CC_ROWS]; + int sf[PC_CC_ROWS][PC_CC_COLS]; +}; + +/** + * struct pc_temp_ocv_lut - + * @rows: number of percent charge entries should be <= PC_TEMP_ROWS + * @cols: number of temperature entries should be <= PC_TEMP_COLS + * @temp: the temperatures at which ocv data is available in the table + * The temperatures must be in increasing order from 0 to rows. + * @percent: the percent charge at which ocv data is available in the table + * The percentcharge must be in decreasing order from 0 to cols. + * @ocv: the open circuit voltage + */ +struct pc_temp_ocv_lut { + int rows; + int cols; + int temp[PC_TEMP_COLS]; + int percent[PC_TEMP_ROWS]; + int ocv[PC_TEMP_ROWS][PC_TEMP_COLS]; +}; + +struct ibat_temp_acc_lut { + int rows; + int cols; + int temp[ACC_TEMP_COLS]; + int ibat[ACC_IBAT_ROWS]; + int acc[ACC_IBAT_ROWS][ACC_TEMP_COLS]; +}; + +struct batt_ids { + int kohm[MAX_BATT_ID_NUM]; + int num; +}; + +enum battery_type { + BATT_UNKNOWN = 0, + BATT_PALLADIUM, + BATT_DESAY, + BATT_OEM, + BATT_QRD_4V35_2000MAH, + BATT_QRD_4V2_1300MAH, +}; + +/** + * struct bms_battery_data - + * @fcc: full charge capacity (mAmpHour) + * @fcc_temp_lut: table to get fcc at a given temp + * @pc_temp_ocv_lut: table to get percent charge given batt temp and cycles + * @pc_sf_lut: table to get percent charge scaling factor given cycles + * and percent charge + * @rbatt_sf_lut: table to get battery resistance scaling factor given + * temperature and percent charge + * @default_rbatt_mohm: the default value of battery resistance to use when + * readings from bms are not available. + * @delta_rbatt_mohm: the resistance to be added towards lower soc to + * compensate for battery capacitance. + * @rbatt_capacitve_mohm: the resistance to be added to compensate for + * battery capacitance + * @flat_ocv_threshold_uv: the voltage where the battery's discharge curve + * starts flattening out. + * @max_voltage_uv: max voltage of the battery + * @cutoff_uv: cutoff voltage of the battery + * @iterm_ua: termination current of the battery when charging + * to 100% + * @batt_id_kohm: the best matched battery id resistor value + * @fastchg_current_ma: maximum fast charge current + * @fg_cc_cv_threshold_mv: CC to CV threashold voltage + */ + +struct bms_battery_data { + unsigned int fcc; + struct single_row_lut *fcc_temp_lut; + struct single_row_lut *fcc_sf_lut; + struct pc_temp_ocv_lut *pc_temp_ocv_lut; + struct ibat_temp_acc_lut *ibat_acc_lut; + struct sf_lut *pc_sf_lut; + struct sf_lut *rbatt_sf_lut; + int default_rbatt_mohm; + int delta_rbatt_mohm; + int rbatt_capacitive_mohm; + int flat_ocv_threshold_uv; + int max_voltage_uv; + int cutoff_uv; + int iterm_ua; + int batt_id_kohm; + int fastchg_current_ma; + int fg_cc_cv_threshold_mv; + const char *battery_type; +}; + +#define is_between(left, right, value) \ + (((left) >= (right) && (left) >= (value) \ + && (value) >= (right)) \ + || ((left) <= (right) && (left) <= (value) \ + && (value) <= (right))) + +#if defined(CONFIG_PM8921_BMS) || \ + defined(CONFIG_PM8921_BMS_MODULE) || \ + defined(CONFIG_QPNP_BMS) || \ + defined(CONFIG_QPNP_VM_BMS) +extern struct bms_battery_data palladium_1500_data; +extern struct bms_battery_data desay_5200_data; +extern struct bms_battery_data oem_batt_data; +extern struct bms_battery_data QRD_4v35_2000mAh_data; +extern struct bms_battery_data qrd_4v2_1300mah_data; + +int interpolate_fcc(struct single_row_lut *fcc_temp_lut, int batt_temp); +int interpolate_scalingfactor(struct sf_lut *sf_lut, int row_entry, int pc); +int interpolate_scalingfactor_fcc(struct single_row_lut *fcc_sf_lut, + int cycles); +int interpolate_pc(struct pc_temp_ocv_lut *pc_temp_ocv, + int batt_temp_degc, int ocv); +int interpolate_ocv(struct pc_temp_ocv_lut *pc_temp_ocv, + int batt_temp_degc, int pc); +int interpolate_slope(struct pc_temp_ocv_lut *pc_temp_ocv, + int batt_temp, int pc); +int interpolate_acc(struct ibat_temp_acc_lut *ibat_acc_lut, + int batt_temp, int ibat); +int linear_interpolate(int y0, int x0, int y1, int x1, int x); +#else +static inline int interpolate_fcc(struct single_row_lut *fcc_temp_lut, + int batt_temp) +{ + return -EINVAL; +} +static inline int interpolate_scalingfactor(struct sf_lut *sf_lut, + int row_entry, int pc) +{ + return -EINVAL; +} +static inline int interpolate_scalingfactor_fcc( + struct single_row_lut *fcc_sf_lut, int cycles) +{ + return -EINVAL; +} +static inline int interpolate_pc(struct pc_temp_ocv_lut *pc_temp_ocv, + int batt_temp_degc, int ocv) +{ + return -EINVAL; +} +static inline int interpolate_ocv(struct pc_temp_ocv_lut *pc_temp_ocv, + int batt_temp_degc, int pc) +{ + return -EINVAL; +} +static inline int interpolate_slope(struct pc_temp_ocv_lut *pc_temp_ocv, + int batt_temp, int pc) +{ + return -EINVAL; +} +static inline int linear_interpolate(int y0, int x0, int y1, int x1, int x) +{ + return -EINVAL; +} +static inline int interpolate_acc(struct ibat_temp_acc_lut *ibat_acc_lut, + int batt_temp, int ibat) +{ + return -EINVAL; +} +#endif + +#endif diff --git a/include/linux/leds-qpnp-wled.h b/include/linux/leds-qpnp-wled.h new file mode 100644 index 000000000000..6880bc41394c --- /dev/null +++ b/include/linux/leds-qpnp-wled.h @@ -0,0 +1,22 @@ +/* Copyright (c) 2014, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __LEDS_QPNP_WLED_H + +#ifdef CONFIG_LEDS_QPNP_WLED +int qpnp_ibb_enable(bool state); +#else +int qpnp_ibb_enable(bool state) +{ + return 0; +} +#endif +#endif diff --git a/include/linux/msm_bcl.h b/include/linux/msm_bcl.h new file mode 100644 index 000000000000..3b84f37ed956 --- /dev/null +++ b/include/linux/msm_bcl.h @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2014, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MSM_BCL_H +#define __MSM_BCL_H + +#define BCL_NAME_MAX_LEN 20 + +enum bcl_trip_type { + BCL_HIGH_TRIP, + BCL_LOW_TRIP, + BCL_TRIP_MAX, +}; + +enum bcl_param { + BCL_PARAM_VOLTAGE, + BCL_PARAM_CURRENT, + BCL_PARAM_MAX, +}; + +struct bcl_threshold { + int trip_value; + enum bcl_trip_type type; + void *trip_data; + void (*trip_notify) (enum bcl_trip_type, int, void *); +}; +struct bcl_param_data; +struct bcl_driver_ops { + int (*read) (int *); + int (*set_high_trip) (int); + int (*get_high_trip) (int *); + int (*set_low_trip) (int); + int (*get_low_trip) (int *); + int (*disable) (void); + int (*enable) (void); + int (*notify) (struct bcl_param_data *, int, + enum bcl_trip_type); +}; + +struct bcl_param_data { + char name[BCL_NAME_MAX_LEN]; + struct device device; + struct bcl_driver_ops *ops; + int high_trip; + int low_trip; + int last_read_val; + bool registered; + struct kobj_attribute val_attr; + struct kobj_attribute high_trip_attr; + struct kobj_attribute low_trip_attr; + struct attribute_group bcl_attr_gp; + struct bcl_threshold *thresh[BCL_TRIP_MAX]; +}; + +#ifdef CONFIG_MSM_BCL_CTL +struct bcl_param_data *msm_bcl_register_param(enum bcl_param, + struct bcl_driver_ops *, char *); +int msm_bcl_unregister_param(struct bcl_param_data *); +int msm_bcl_enable(void); +int msm_bcl_disable(void); +int msm_bcl_set_threshold(enum bcl_param, enum bcl_trip_type, + struct bcl_threshold *); +int msm_bcl_read(enum bcl_param, int *); +#else +static inline struct bcl_param_data *msm_bcl_register_param( + enum bcl_param param_type, struct bcl_driver_ops *ops, char *name) +{ + return NULL; +} +static inline int msm_bcl_unregister_param(struct bcl_param_data *data) +{ + return -ENOSYS; +} +static inline int msm_bcl_enable(void) +{ + return -ENOSYS; +} +static inline int msm_bcl_disable(void) +{ + return -ENOSYS; +} +static inline int msm_bcl_set_threshold(enum bcl_param param_type, + enum bcl_trip_type type, + struct bcl_threshold *inp_thresh) +{ + return -ENOSYS; +} +static inline int msm_bcl_read(enum bcl_param param_type, int *vbat_value) +{ + return -ENOSYS; +} +#endif + +#endif /*__MSM_BCL_H*/ diff --git a/include/linux/of_batterydata.h b/include/linux/of_batterydata.h new file mode 100644 index 000000000000..fe2c996de264 --- /dev/null +++ b/include/linux/of_batterydata.h @@ -0,0 +1,67 @@ +/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/of.h> +#include <linux/batterydata-lib.h> + +#ifdef CONFIG_OF_BATTERYDATA +/** + * of_batterydata_read_data() - Populate battery data from the device tree + * @container_node: pointer to the battery-data container device node + * containing the profile nodes. + * @batt_data: pointer to an allocated bms_battery_data structure that the + * loaded profile will be written to. + * @batt_id_uv: ADC voltage of the battery id line used to differentiate + * between different battery profiles. If there are multiple + * battery data in the device tree, the one with the closest + * battery id resistance will be automatically loaded. + * + * This routine loads the closest match battery data from device tree based on + * the battery id reading. Then, it will try to load all the relevant data from + * the device tree battery data profile. + * + * If any of the lookup table pointers are NULL, this routine will skip trying + * to read them. + */ +int of_batterydata_read_data(struct device_node *container_node, + struct bms_battery_data *batt_data, + int batt_id_uv); +/** + * of_batterydata_get_best_profile() - Find matching battery data device node + * @batterydata_container_node: pointer to the battery-data container device + * node containing the profile nodes. + * @psy_name: Name of the power supply which holds the + * POWER_SUPPLY_RESISTANCE_ID value to be used to match + * against the id resistances specified in the corresponding + * battery data profiles. + * @batt_type: Battery type which we want to force load the profile. + * + * This routine returns a device_node pointer to the closest match battery data + * from device tree based on the battery id reading. + */ +struct device_node *of_batterydata_get_best_profile( + struct device_node *batterydata_container_node, + const char *psy_name, const char *batt_type); +#else +static inline int of_batterydata_read_data(struct device_node *container_node, + struct bms_battery_data *batt_data, + int batt_id_uv) +{ + return -ENXIO; +} +static inline struct device_node *of_batterydata_get_best_profile( + struct device_node *batterydata_container_node, + struct device_node *best_node, const char *psy_name) +{ + return -ENXIO; +} +#endif /* CONFIG_OF_QPNP */ diff --git a/include/linux/power/qcom/apm.h b/include/linux/power/qcom/apm.h new file mode 100644 index 000000000000..c71f9547f5d9 --- /dev/null +++ b/include/linux/power/qcom/apm.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __LINUX_POWER_QCOM_APM_H__ +#define __LINUX_POWER_QCOM_APM_H__ + +#include <linux/device.h> +#include <linux/err.h> + +/** + * enum msm_apm_supply - supported power rails to supply memory arrays + * %MSM_APM_SUPPLY_APCC: to enable selection of VDD_APCC rail as supply + * %MSM_APM_SUPPLY_MX: to enable selection of VDD_MX rail as supply + */ +enum msm_apm_supply { + MSM_APM_SUPPLY_APCC, + MSM_APM_SUPPLY_MX, +}; + +/* Handle used to identify an APM controller device */ +struct msm_apm_ctrl_dev; + +#ifdef CONFIG_MSM_APM +struct msm_apm_ctrl_dev *msm_apm_ctrl_dev_get(struct device *dev); +int msm_apm_set_supply(struct msm_apm_ctrl_dev *ctrl_dev, + enum msm_apm_supply supply); +int msm_apm_get_supply(struct msm_apm_ctrl_dev *ctrl_dev); + +#else +static inline struct msm_apm_ctrl_dev *msm_apm_ctrl_dev_get(struct device *dev) +{ return ERR_PTR(-EPERM); } +static inline int msm_apm_set_supply(struct msm_apm_ctrl_dev *ctrl_dev, + enum msm_apm_supply supply) +{ return -EPERM; } +static inline int msm_apm_get_supply(struct msm_apm_ctrl_dev *ctrl_dev); +{ return -EPERM; } +#endif +#endif diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h index 1c075892c6fd..647d84dd60bb 100644 --- a/include/linux/power_supply.h +++ b/include/linux/power_supply.h @@ -46,6 +46,7 @@ enum { POWER_SUPPLY_CHARGE_TYPE_NONE, POWER_SUPPLY_CHARGE_TYPE_TRICKLE, POWER_SUPPLY_CHARGE_TYPE_FAST, + POWER_SUPPLY_CHARGE_TYPE_TAPER, }; enum { @@ -58,6 +59,8 @@ enum { POWER_SUPPLY_HEALTH_COLD, POWER_SUPPLY_HEALTH_WATCHDOG_TIMER_EXPIRE, POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE, + POWER_SUPPLY_HEALTH_WARM, + POWER_SUPPLY_HEALTH_COOL, }; enum { @@ -85,6 +88,22 @@ enum { POWER_SUPPLY_SCOPE_DEVICE, }; +enum { + POWER_SUPPLY_DP_DM_UNKNOWN = 0, + POWER_SUPPLY_DP_DM_PREPARE = 1, + POWER_SUPPLY_DP_DM_UNPREPARE = 2, + POWER_SUPPLY_DP_DM_CONFIRMED_HVDCP3 = 3, + POWER_SUPPLY_DP_DM_DP_PULSE = 4, + POWER_SUPPLY_DP_DM_DM_PULSE = 5, + POWER_SUPPLY_DP_DM_DP0P6_DMF = 6, + POWER_SUPPLY_DP_DM_DP0P6_DM3P3 = 7, + POWER_SUPPLY_DP_DM_DPF_DMF = 8, + POWER_SUPPLY_DP_DM_DPR_DMR = 9, + POWER_SUPPLY_DP_DM_HVDCP3_SUPPORTED = 10, + POWER_SUPPLY_DP_DM_ICL_DOWN = 11, + POWER_SUPPLY_DP_DM_ICL_UP = 12, +}; + enum power_supply_property { /* Properties of type `int' */ POWER_SUPPLY_PROP_STATUS = 0, @@ -114,6 +133,8 @@ enum power_supply_property { POWER_SUPPLY_PROP_CHARGE_FULL, POWER_SUPPLY_PROP_CHARGE_EMPTY, POWER_SUPPLY_PROP_CHARGE_NOW, + POWER_SUPPLY_PROP_CHARGE_NOW_RAW, + POWER_SUPPLY_PROP_CHARGE_NOW_ERROR, POWER_SUPPLY_PROP_CHARGE_AVG, POWER_SUPPLY_PROP_CHARGE_COUNTER, POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, @@ -133,6 +154,7 @@ enum power_supply_property { POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN, /* in percents! */ POWER_SUPPLY_PROP_CAPACITY_ALERT_MAX, /* in percents! */ POWER_SUPPLY_PROP_CAPACITY_LEVEL, + POWER_SUPPLY_PROP_CAPACITY_RAW, POWER_SUPPLY_PROP_TEMP, POWER_SUPPLY_PROP_TEMP_MAX, POWER_SUPPLY_PROP_TEMP_MIN, @@ -153,12 +175,47 @@ enum power_supply_property { POWER_SUPPLY_PROP_USB_HC, POWER_SUPPLY_PROP_USB_OTG, POWER_SUPPLY_PROP_CHARGE_ENABLED, + POWER_SUPPLY_PROP_BATTERY_CHARGING_ENABLED, + POWER_SUPPLY_PROP_CHARGING_ENABLED, + POWER_SUPPLY_PROP_INPUT_VOLTAGE_REGULATION, + POWER_SUPPLY_PROP_INPUT_CURRENT_MAX, + POWER_SUPPLY_PROP_INPUT_CURRENT_TRIM, + POWER_SUPPLY_PROP_INPUT_CURRENT_SETTLED, + POWER_SUPPLY_PROP_VCHG_LOOP_DBC_BYPASS, + POWER_SUPPLY_PROP_CHARGE_COUNTER_SHADOW, + POWER_SUPPLY_PROP_HI_POWER, + POWER_SUPPLY_PROP_LOW_POWER, + POWER_SUPPLY_PROP_COOL_TEMP, + POWER_SUPPLY_PROP_WARM_TEMP, + POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL, + POWER_SUPPLY_PROP_RESISTANCE, + POWER_SUPPLY_PROP_RESISTANCE_CAPACITIVE, + POWER_SUPPLY_PROP_RESISTANCE_ID, /* in Ohms */ + POWER_SUPPLY_PROP_RESISTANCE_NOW, + POWER_SUPPLY_PROP_FLASH_CURRENT_MAX, + POWER_SUPPLY_PROP_UPDATE_NOW, + POWER_SUPPLY_PROP_ESR_COUNT, + POWER_SUPPLY_PROP_SAFETY_TIMER_ENABLE, + POWER_SUPPLY_PROP_CHARGE_DONE, + POWER_SUPPLY_PROP_FLASH_ACTIVE, + POWER_SUPPLY_PROP_FLASH_TRIGGER, + POWER_SUPPLY_PROP_FORCE_TLIM, + POWER_SUPPLY_PROP_DP_DM, + POWER_SUPPLY_PROP_INPUT_CURRENT_LIMITED, + POWER_SUPPLY_PROP_INPUT_CURRENT_NOW, + POWER_SUPPLY_PROP_RERUN_AICL, + POWER_SUPPLY_PROP_CYCLE_COUNT_ID, + POWER_SUPPLY_PROP_SAFETY_TIMER_EXPIRED, + POWER_SUPPLY_PROP_RESTRICTED_CHARGING, + POWER_SUPPLY_PROP_CURRENT_CAPABILITY, + POWER_SUPPLY_PROP_TYPEC_MODE, /* Local extensions of type int64_t */ POWER_SUPPLY_PROP_CHARGE_COUNTER_EXT, /* Properties of type `const char *' */ POWER_SUPPLY_PROP_MODEL_NAME, POWER_SUPPLY_PROP_MANUFACTURER, POWER_SUPPLY_PROP_SERIAL_NUMBER, + POWER_SUPPLY_PROP_BATTERY_TYPE, }; enum power_supply_type { @@ -170,6 +227,15 @@ enum power_supply_type { POWER_SUPPLY_TYPE_USB_DCP, /* Dedicated Charging Port */ POWER_SUPPLY_TYPE_USB_CDP, /* Charging Downstream Port */ POWER_SUPPLY_TYPE_USB_ACA, /* Accessory Charger Adapters */ + POWER_SUPPLY_TYPE_USB_HVDCP, /* High Voltage DCP */ + POWER_SUPPLY_TYPE_USB_HVDCP_3, /* Efficient High Voltage DCP */ + POWER_SUPPLY_TYPE_WIRELESS, /* Accessory Charger Adapters */ + POWER_SUPPLY_TYPE_BMS, /* Battery Monitor System */ + POWER_SUPPLY_TYPE_USB_PARALLEL, /* USB Parallel Path */ + POWER_SUPPLY_TYPE_WIPOWER, /* Wipower */ + POWER_SUPPLY_TYPE_TYPEC, /*Type-C */ + POWER_SUPPLY_TYPE_UFP, /* Type-C UFP */ + POWER_SUPPLY_TYPE_DFP, /* TYpe-C DFP */ }; enum power_supply_notifier_events { @@ -369,6 +435,9 @@ static inline bool power_supply_is_amp_property(enum power_supply_property psp) case POWER_SUPPLY_PROP_CURRENT_NOW: case POWER_SUPPLY_PROP_CURRENT_AVG: case POWER_SUPPLY_PROP_CURRENT_BOOT: + case POWER_SUPPLY_PROP_CHARGE_COUNTER_SHADOW: + case POWER_SUPPLY_PROP_INPUT_CURRENT_MAX: + case POWER_SUPPLY_PROP_FLASH_CURRENT_MAX: return 1; default: break; diff --git a/include/linux/qpnp/pin.h b/include/linux/qpnp/pin.h new file mode 100644 index 000000000000..7fb57aa7a778 --- /dev/null +++ b/include/linux/qpnp/pin.h @@ -0,0 +1,226 @@ +/* Copyright (c) 2012, 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* Mode select */ +#define QPNP_PIN_MODE_DIG_IN 0 +#define QPNP_PIN_MODE_DIG_OUT 1 +#define QPNP_PIN_MODE_DIG_IN_OUT 2 +#define QPNP_PIN_MODE_ANA_PASS_THRU 3 +#define QPNP_PIN_MODE_BIDIR 3 +#define QPNP_PIN_MODE_AIN 4 +#define QPNP_PIN_MODE_AOUT 5 +#define QPNP_PIN_MODE_SINK 6 + +/* Invert source select (GPIO, MPP) */ +#define QPNP_PIN_INVERT_DISABLE 0 +#define QPNP_PIN_INVERT_ENABLE 1 + +/* Output type (GPIO) */ +#define QPNP_PIN_OUT_BUF_CMOS 0 +#define QPNP_PIN_OUT_BUF_OPEN_DRAIN_NMOS 1 +#define QPNP_PIN_OUT_BUF_OPEN_DRAIN_PMOS 2 +#define QPNP_PIN_OUT_BUF_NO_DRIVE 3 + +/* Voltage select (GPIO, MPP) */ +#define QPNP_PIN_VIN0 0 +#define QPNP_PIN_VIN1 1 +#define QPNP_PIN_VIN2 2 +#define QPNP_PIN_VIN3 3 +#define QPNP_PIN_VIN4 4 +#define QPNP_PIN_VIN5 5 +#define QPNP_PIN_VIN6 6 +#define QPNP_PIN_VIN7 7 + +/* Pull Up Values (GPIO) */ +#define QPNP_PIN_GPIO_PULL_UP_30 0 +#define QPNP_PIN_GPIO_PULL_UP_1P5 1 +#define QPNP_PIN_GPIO_PULL_UP_31P5 2 +#define QPNP_PIN_GPIO_PULL_UP_1P5_30 3 +#define QPNP_PIN_GPIO_PULL_DN 4 +#define QPNP_PIN_GPIO_PULL_NO 5 + +/* Pull Up Values (MPP) */ +#define QPNP_PIN_MPP_PULL_UP_0P6KOHM 0 +#define QPNP_PIN_MPP_PULL_UP_OPEN 1 +#define QPNP_PIN_MPP_PULL_UP_10KOHM 2 +#define QPNP_PIN_MPP_PULL_UP_30KOHM 3 + +/* Out Strength (GPIO) */ +#define QPNP_PIN_OUT_STRENGTH_LOW 1 +#define QPNP_PIN_OUT_STRENGTH_MED 2 +#define QPNP_PIN_OUT_STRENGTH_HIGH 3 + +/* Digital-in CTL (GPIO/MPP) */ +#define QPNP_PIN_DIG_IN_CTL_DTEST1 1 +#define QPNP_PIN_DIG_IN_CTL_DTEST2 2 +#define QPNP_PIN_DIG_IN_CTL_DTEST3 3 +#define QPNP_PIN_DIG_IN_CTL_DTEST4 4 + +/* Source Select (GPIO) / Enable Select (MPP) */ +#define QPNP_PIN_SEL_FUNC_CONSTANT 0 +#define QPNP_PIN_SEL_FUNC_PAIRED 1 +#define QPNP_PIN_SEL_FUNC_1 2 +#define QPNP_PIN_SEL_FUNC_2 3 +#define QPNP_PIN_SEL_DTEST1 4 +#define QPNP_PIN_SEL_DTEST2 5 +#define QPNP_PIN_SEL_DTEST3 6 +#define QPNP_PIN_SEL_DTEST4 7 + +/* Source Select for GPIO_LV/GPIO_MV only */ +#define QPNP_PIN_LV_MV_SEL_FUNC_CONSTANT 0 +#define QPNP_PIN_LV_MV_SEL_FUNC_PAIRED 1 +#define QPNP_PIN_LV_MV_SEL_FUNC_1 2 +#define QPNP_PIN_LV_MV_SEL_FUNC_2 3 +#define QPNP_PIN_LV_MV_SEL_FUNC_3 4 +#define QPNP_PIN_LV_MV_SEL_FUNC_4 5 +#define QPNP_PIN_LV_MV_SEL_DTEST1 6 +#define QPNP_PIN_LV_MV_SEL_DTEST2 7 +#define QPNP_PIN_LV_MV_SEL_DTEST3 8 +#define QPNP_PIN_LV_MV_SEL_DTEST4 9 + +/* Master enable (GPIO, MPP) */ +#define QPNP_PIN_MASTER_DISABLE 0 +#define QPNP_PIN_MASTER_ENABLE 1 + +/* Analog Output (MPP) */ +#define QPNP_PIN_AOUT_1V25 0 +#define QPNP_PIN_AOUT_0V625 1 +#define QPNP_PIN_AOUT_0V3125 2 +#define QPNP_PIN_AOUT_MPP 3 +#define QPNP_PIN_AOUT_ABUS1 4 +#define QPNP_PIN_AOUT_ABUS2 5 +#define QPNP_PIN_AOUT_ABUS3 6 +#define QPNP_PIN_AOUT_ABUS4 7 + +/* Analog Input (MPP) */ +#define QPNP_PIN_AIN_AMUX_CH5 0 +#define QPNP_PIN_AIN_AMUX_CH6 1 +#define QPNP_PIN_AIN_AMUX_CH7 2 +#define QPNP_PIN_AIN_AMUX_CH8 3 +#define QPNP_PIN_AIN_AMUX_ABUS1 4 +#define QPNP_PIN_AIN_AMUX_ABUS2 5 +#define QPNP_PIN_AIN_AMUX_ABUS3 6 +#define QPNP_PIN_AIN_AMUX_ABUS4 7 + +/* Current Sink (MPP) */ +#define QPNP_PIN_CS_OUT_5MA 0 +#define QPNP_PIN_CS_OUT_10MA 1 +#define QPNP_PIN_CS_OUT_15MA 2 +#define QPNP_PIN_CS_OUT_20MA 3 +#define QPNP_PIN_CS_OUT_25MA 4 +#define QPNP_PIN_CS_OUT_30MA 5 +#define QPNP_PIN_CS_OUT_35MA 6 +#define QPNP_PIN_CS_OUT_40MA 7 + +/* ANALOG PASS SEL (GPIO LV/MV) */ +#define QPNP_PIN_APASS_SEL_ATEST1 0 +#define QPNP_PIN_APASS_SEL_ATEST2 1 +#define QPNP_PIN_APASS_SEL_ATEST3 2 +#define QPNP_PIN_APASS_SEL_ATEST4 3 + +/** + * struct qpnp_pin_cfg - structure to specify pin configurtion values + * @mode: indicates whether the pin should be input, output, or + * both for gpios. mpp pins also support bidirectional, + * analog in, analog out and current sink. This value + * should be of type QPNP_PIN_MODE_*. + * @output_type: indicates pin should be configured as CMOS or open + * drain. Should be of the type QPNP_PIN_OUT_BUF_*. This + * setting applies for gpios only. + * @invert: Invert the signal of the line - + * QPNP_PIN_INVERT_DISABLE or QPNP_PIN_INVERT_ENABLE. + * @pull: This parameter should be programmed to different values + * depending on whether it's GPIO or MPP. + * For GPIO, it indicates whether a pull up or pull down + * should be applied. If a pullup is required the + * current strength needs to be specified. + * Current values of 30uA, 1.5uA, 31.5uA, 1.5uA with 30uA + * boost are supported. This value should be one of + * the QPNP_PIN_GPIO_PULL_*. Note that the hardware ignores + * this configuration if the GPIO is not set to input or + * output open-drain mode. + * For MPP, it indicates whether a pullup should be + * applied for bidirectitional mode only. The hardware + * ignores the configuration when operating in other modes. + * This value should be one of the QPNP_PIN_MPP_PULL_*. + * @vin_sel: specifies the voltage level when the output is set to 1. + * For an input gpio specifies the voltage level at which + * the input is interpreted as a logical 1. + * @out_strength: the amount of current supplied for an output gpio, + * should be of the type QPNP_PIN_STRENGTH_*. + * @src_sel: select alternate function for the pin. Certain pins + * can be paired (shorted) with each other. Some pins + * can act as alternate functions. In the context of + * gpio, this acts as a source select. For mpps, + * this is an enable select. + * This parameter should be of type QPNP_PIN_SEL_*. + * @master_en: QPNP_PIN_MASTER_ENABLE = Enable features within the + * pin block based on configurations. + * QPNP_PIN_MASTER_DISABLE = Completely disable the pin + * block and let the pin float with high impedance + * regardless of other settings. + * @aout_ref: Set the analog output reference. This parameter should + * be of type QPNP_PIN_AOUT_*. This parameter only applies + * to mpp pins. + * @ain_route: Set the source for analog input. This parameter + * should be of type QPNP_PIN_AIN_*. This parameter only + * applies to mpp pins. + * @cs_out: Set the the amount of current to sync in mA. This + * parameter should be of type QPNP_PIN_CS_OUT_*. This + * parameter only applies to mpp pins. + * @apass_sel: Set the ATEST line to which the signal is to be + * routed to. The parameter should be of type + * QPNP_PIN_APASS_SEL_*. This + * parameter only applies to GPIO LV/MV pins. + * @dtest_sel: Select the DTEST line to which the signal needs + * is routed to. The parameter should be of type + * QPNP_PIN_DIG_IN_CTL_*. The parameter applies + * to both gpio and mpp pins. + */ +struct qpnp_pin_cfg { + int mode; + int output_type; + int invert; + int pull; + int vin_sel; + int out_strength; + int src_sel; + int master_en; + int aout_ref; + int ain_route; + int cs_out; + int apass_sel; + int dtest_sel; +}; + +/** + * qpnp_pin_config - Apply pin configuration for Linux gpio + * @gpio: Linux gpio number to configure. + * @param: parameters to configure. + * + * This routine takes a Linux gpio number that corresponds with a + * PMIC pin and applies the configuration specified in 'param'. + * This gpio number can be ascertained by of_get_gpio_flags() or + * the qpnp_pin_map_gpio() API. + */ +int qpnp_pin_config(int gpio, struct qpnp_pin_cfg *param); + +/** + * qpnp_pin_map - Obtain Linux GPIO number from device spec + * @name: Name assigned by the 'label' binding for the primary node. + * @pmic_pin: PMIC pin number to lookup. + * + * This routine is used in legacy configurations that do not support + * Device Tree. If you are using Device Tree, you should not use this. + * For such cases, use of_get_gpio() or friends instead. + */ +int qpnp_pin_map(const char *name, uint32_t pmic_pin); diff --git a/include/linux/qpnp/power-on.h b/include/linux/qpnp/power-on.h new file mode 100644 index 000000000000..da8f5a8622dd --- /dev/null +++ b/include/linux/qpnp/power-on.h @@ -0,0 +1,96 @@ +/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef QPNP_PON_H +#define QPNP_PON_H + +#include <linux/errno.h> + +/** + * enum pon_trigger_source: List of PON trigger sources + * %PON_SMPL: PON triggered by SMPL - Sudden Momentary Power Loss + * %PON_RTC: PON triggered by RTC alarm + * %PON_DC_CHG: PON triggered by insertion of DC charger + * %PON_USB_CHG: PON triggered by insertion of USB + * %PON_PON1: PON triggered by other PMIC (multi-PMIC option) + * %PON_CBLPWR_N: PON triggered by power-cable insertion + * %PON_KPDPWR_N: PON triggered by long press of the power-key + */ +enum pon_trigger_source { + PON_SMPL = 1, + PON_RTC, + PON_DC_CHG, + PON_USB_CHG, + PON_PON1, + PON_CBLPWR_N, + PON_KPDPWR_N, +}; + +/** + * enum pon_power_off_type: Possible power off actions to perform + * %PON_POWER_OFF_RESERVED: Reserved, not used + * %PON_POWER_OFF_WARM_RESET: Reset the MSM but not all PMIC peripherals + * %PON_POWER_OFF_SHUTDOWN: Shutdown the MSM and PMIC completely + * %PON_POWER_OFF_HARD_RESET: Reset the MSM and all PMIC peripherals + */ +enum pon_power_off_type { + PON_POWER_OFF_RESERVED = 0x00, + PON_POWER_OFF_WARM_RESET = 0x01, + PON_POWER_OFF_SHUTDOWN = 0x04, + PON_POWER_OFF_HARD_RESET = 0x07, + PON_POWER_OFF_MAX_TYPE = 0x10, +}; + +enum pon_restart_reason { + PON_RESTART_REASON_UNKNOWN = 0x00, + PON_RESTART_REASON_RECOVERY = 0x01, + PON_RESTART_REASON_BOOTLOADER = 0x02, + PON_RESTART_REASON_RTC = 0x03, + PON_RESTART_REASON_DMVERITY_CORRUPTED = 0x04, + PON_RESTART_REASON_DMVERITY_ENFORCE = 0x05, + PON_RESTART_REASON_KEYS_CLEAR = 0x06, +}; + +#ifdef CONFIG_QPNP_POWER_ON +int qpnp_pon_system_pwr_off(enum pon_power_off_type type); +int qpnp_pon_is_warm_reset(void); +int qpnp_pon_trigger_config(enum pon_trigger_source pon_src, bool enable); +int qpnp_pon_wd_config(bool enable); +int qpnp_pon_set_restart_reason(enum pon_restart_reason reason); +bool qpnp_pon_check_hard_reset_stored(void); + +#else +static int qpnp_pon_system_pwr_off(enum pon_power_off_type type) +{ + return -ENODEV; +} +static inline int qpnp_pon_is_warm_reset(void) { return -ENODEV; } +static inline int qpnp_pon_trigger_config(enum pon_trigger_source pon_src, + bool enable) +{ + return -ENODEV; +} +int qpnp_pon_wd_config(bool enable) +{ + return -ENODEV; +} +static inline int qpnp_pon_set_restart_reason(enum pon_restart_reason reason) +{ + return -ENODEV; +} +static inline bool qpnp_pon_check_hard_reset_stored(void) +{ + return false; +} +#endif + +#endif diff --git a/include/linux/qpnp/qpnp-adc.h b/include/linux/qpnp/qpnp-adc.h new file mode 100644 index 000000000000..63bbbd69a94a --- /dev/null +++ b/include/linux/qpnp/qpnp-adc.h @@ -0,0 +1,2268 @@ +/* + * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +/* + * Qualcomm PMIC QPNP ADC driver header file + * + */ + +#ifndef __QPNP_ADC_H +#define __QPNP_ADC_H + +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/qpnp/qpnp-revid.h> +#include <linux/regulator/consumer.h> +/** + * enum qpnp_vadc_channels - QPNP AMUX arbiter channels + */ +enum qpnp_vadc_channels { + USBIN = 0, + DCIN, + VCHG_SNS, + SPARE1_03, + USB_ID_MV, + VCOIN, + VBAT_SNS, + VSYS, + DIE_TEMP, + REF_625MV, + REF_125V, + CHG_TEMP, + SPARE1, + SPARE2, + GND_REF, + VDD_VADC, + P_MUX1_1_1, + P_MUX2_1_1, + P_MUX3_1_1, + P_MUX4_1_1, + P_MUX5_1_1, + P_MUX6_1_1, + P_MUX7_1_1, + P_MUX8_1_1, + P_MUX9_1_1, + P_MUX10_1_1, + P_MUX11_1_1, + P_MUX12_1_1, + P_MUX13_1_1, + P_MUX14_1_1, + P_MUX15_1_1, + P_MUX16_1_1, + P_MUX1_1_3, + P_MUX2_1_3, + P_MUX3_1_3, + P_MUX4_1_3, + P_MUX5_1_3, + P_MUX6_1_3, + P_MUX7_1_3, + P_MUX8_1_3, + P_MUX9_1_3, + P_MUX10_1_3, + P_MUX11_1_3, + P_MUX12_1_3, + P_MUX13_1_3, + P_MUX14_1_3, + P_MUX15_1_3, + P_MUX16_1_3, + LR_MUX1_BATT_THERM, + LR_MUX2_BAT_ID, + LR_MUX3_XO_THERM, + LR_MUX4_AMUX_THM1, + LR_MUX5_AMUX_THM2, + LR_MUX6_AMUX_THM3, + LR_MUX7_HW_ID, + LR_MUX8_AMUX_THM4, + LR_MUX9_AMUX_THM5, + LR_MUX10_USB_ID_LV, + AMUX_PU1, + AMUX_PU2, + LR_MUX3_BUF_XO_THERM_BUF, + LR_MUX1_PU1_BAT_THERM = 112, + LR_MUX2_PU1_BAT_ID = 113, + LR_MUX3_PU1_XO_THERM = 114, + LR_MUX4_PU1_AMUX_THM1 = 115, + LR_MUX5_PU1_AMUX_THM2 = 116, + LR_MUX6_PU1_AMUX_THM3 = 117, + LR_MUX7_PU1_AMUX_HW_ID = 118, + LR_MUX8_PU1_AMUX_THM4 = 119, + LR_MUX9_PU1_AMUX_THM5 = 120, + LR_MUX10_PU1_AMUX_USB_ID_LV = 121, + LR_MUX3_BUF_PU1_XO_THERM_BUF = 124, + LR_MUX1_PU2_BAT_THERM = 176, + LR_MUX2_PU2_BAT_ID = 177, + LR_MUX3_PU2_XO_THERM = 178, + LR_MUX4_PU2_AMUX_THM1 = 179, + LR_MUX5_PU2_AMUX_THM2 = 180, + LR_MUX6_PU2_AMUX_THM3 = 181, + LR_MUX7_PU2_AMUX_HW_ID = 182, + LR_MUX8_PU2_AMUX_THM4 = 183, + LR_MUX9_PU2_AMUX_THM5 = 184, + LR_MUX10_PU2_AMUX_USB_ID_LV = 185, + LR_MUX3_BUF_PU2_XO_THERM_BUF = 188, + LR_MUX1_PU1_PU2_BAT_THERM = 240, + LR_MUX2_PU1_PU2_BAT_ID = 241, + LR_MUX3_PU1_PU2_XO_THERM = 242, + LR_MUX4_PU1_PU2_AMUX_THM1 = 243, + LR_MUX5_PU1_PU2_AMUX_THM2 = 244, + LR_MUX6_PU1_PU2_AMUX_THM3 = 245, + LR_MUX7_PU1_PU2_AMUX_HW_ID = 246, + LR_MUX8_PU1_PU2_AMUX_THM4 = 247, + LR_MUX9_PU1_PU2_AMUX_THM5 = 248, + LR_MUX10_PU1_PU2_AMUX_USB_ID_LV = 249, + LR_MUX3_BUF_PU1_PU2_XO_THERM_BUF = 252, + ALL_OFF = 255, + ADC_MAX_NUM = 0xffff, + + /* Channel listing for refreshed VADC in hex format */ + VADC_VREF_GND = 0, + VADC_CALIB_VREF_1P25 = 1, + VADC_CALIB_VREF = 2, + VADC_CALIB_VREF_1_DIV_3 = 0x82, + VADC_VPH_PWR = 0x83, + VADC_VBAT_SNS = 0x84, + VADC_VCOIN = 0x85, + VADC_DIE_TEMP = 6, + VADC_CHG_TEMP = 7, + VADC_USB_IN = 8, + VADC_IREG_FB = 9, + /* External input connection */ + VADC_BAT_THERM = 0xa, + VADC_BAT_ID = 0xb, + VADC_XO_THERM = 0xc, + VADC_AMUX_THM1 = 0xd, + VADC_AMUX_THM2 = 0xe, + VADC_AMUX_THM3 = 0xf, + VADC_AMUX_THM4 = 0x10, + VADC_AMUX_THM5 = 0x11, + VADC_AMUX1_GPIO = 0x12, + VADC_AMUX2_GPIO = 0x13, + VADC_AMUX3_GPIO = 0x14, + VADC_AMUX4_GPIO = 0x15, + VADC_AMUX5_GPIO = 0x16, + VADC_AMUX6_GPIO = 0x17, + VADC_AMUX7_GPIO = 0x18, + VADC_AMUX8_GPIO = 0x19, + VADC_ATEST1 = 0x1a, + VADC_ATEST2 = 0x1b, + VADC_ATEST3 = 0x1c, + VADC_ATEST4 = 0x1d, + VADC_OFF = 0xff, + /* PU1 is 30K pull up */ + VADC_BAT_THERM_PU1 = 0x2a, + VADC_BAT_ID_PU1 = 0x2b, + VADC_XO_THERM_PU1 = 0x2c, + VADC_AMUX_THM1_PU1 = 0x2d, + VADC_AMUX_THM2_PU1 = 0x2e, + VADC_AMUX_THM3_PU1 = 0x2f, + VADC_AMUX_THM4_PU1 = 0x30, + VADC_AMUX_THM5_PU1 = 0x31, + VADC_AMUX1_GPIO_PU1 = 0x32, + VADC_AMUX2_GPIO_PU1 = 0x33, + VADC_AMUX3_GPIO_PU1 = 0x34, + VADC_AMUX4_GPIO_PU1 = 0x35, + VADC_AMUX5_GPIO_PU1 = 0x36, + VADC_AMUX6_GPIO_PU1 = 0x37, + VADC_AMUX7_GPIO_PU1 = 0x38, + VADC_AMUX8_GPIO_PU1 = 0x39, + /* PU2 is 100K pull up */ + VADC_BAT_THERM_PU2 = 0x4a, + VADC_BAT_ID_PU2 = 0x4b, + VADC_XO_THERM_PU2 = 0x4c, + VADC_AMUX_THM1_PU2 = 0x4d, + VADC_AMUX_THM2_PU2 = 0x4e, + VADC_AMUX_THM3_PU2 = 0x4f, + VADC_AMUX_THM4_PU2 = 0x50, + VADC_AMUX_THM5_PU2 = 0x51, + VADC_AMUX1_GPIO_PU2 = 0x52, + VADC_AMUX2_GPIO_PU2 = 0x53, + VADC_AMUX3_GPIO_PU2 = 0x54, + VADC_AMUX4_GPIO_PU2 = 0x55, + VADC_AMUX5_GPIO_PU2 = 0x56, + VADC_AMUX6_GPIO_PU2 = 0x57, + VADC_AMUX7_GPIO_PU2 = 0x58, + VADC_AMUX8_GPIO_PU2 = 0x59, + /* PU3 is 400K pull up */ + VADC_BAT_THERM_PU3 = 0x6a, + VADC_BAT_ID_PU3 = 0x6b, + VADC_XO_THERM_PU3 = 0x6c, + VADC_AMUX_THM1_PU3 = 0x6d, + VADC_AMUX_THM2_PU3 = 0x6e, + VADC_AMUX_THM3_PU3 = 0x6f, + VADC_AMUX_THM4_PU3 = 0x70, + VADC_AMUX_THM5_PU3 = 0x71, + VADC_AMUX1_GPIO_PU3 = 0x72, + VADC_AMUX2_GPIO_PU3 = 0x73, + VADC_AMUX3_GPIO_PU3 = 0x74, + VADC_AMUX4_GPIO_PU3 = 0x75, + VADC_AMUX5_GPIO_PU3 = 0x76, + VADC_AMUX6_GPIO_PU3 = 0x77, + VADC_AMUX7_GPIO_PU3 = 0x78, + VADC_AMUX8_GPIO_PU3 = 0x79, + /* External input connection with 1/3 div */ + VADC_AMUX1_GPIO_DIV_3 = 0x92, + VADC_AMUX2_GPIO_DIV_3 = 0x93, + VADC_AMUX3_GPIO_DIV_3 = 0x94, + VADC_AMUX4_GPIO_DIV_3 = 0x95, + VADC_AMUX5_GPIO_DIV_3 = 0x96, + VADC_AMUX6_GPIO_DIV_3 = 0x97, + VADC_AMUX7_GPIO_DIV_3 = 0x98, + VADC_AMUX8_GPIO_DIV_3 = 0x99, + VADC_ATEST1_DIV_3 = 0x9a, + VADC_ATEST2_DIV_3 = 0x9b, + VADC_ATEST3_DIV_3 = 0x9c, + VADC_ATEST4_DIV_3 = 0x9d, + VADC_REFRESH_MAX_NUM = 0xffff, +}; + +/** + * enum qpnp_iadc_channels - QPNP IADC channel list + */ +enum qpnp_iadc_channels { + INTERNAL_RSENSE = 0, + EXTERNAL_RSENSE, + ALT_LEAD_PAIR, + GAIN_CALIBRATION_17P857MV, + OFFSET_CALIBRATION_SHORT_CADC_LEADS, + OFFSET_CALIBRATION_CSP_CSN, + OFFSET_CALIBRATION_CSP2_CSN2, + IADC_MUX_NUM, +}; + +#define QPNP_ADC_625_UV 625000 +#define QPNP_ADC_HWMON_NAME_LENGTH 64 +#define QPNP_MAX_PROP_NAME_LEN 32 +#define QPNP_THERMALNODE_NAME_LENGTH 25 + +/* Structure device for qpnp vadc */ +struct qpnp_vadc_chip; + +/* Structure device for qpnp iadc */ +struct qpnp_iadc_chip; + +/* Structure device for qpnp adc tm */ +struct qpnp_adc_tm_chip; + +/** + * enum qpnp_adc_clk_type - Clock rate supported. + * %CLK_TYPE1: 2P4MHZ + * %CLK_TYPE2: 4P8MHZ + * %CLK_TYPE3: 9P6MHZ + * %CLK_TYPE4: 19P2MHZ + * %CLK_NONE: Do not use this Clk type. + * + * The Clock rate is specific to each channel of the QPNP ADC arbiter. + */ +enum qpnp_adc_clk_type { + CLK_TYPE1 = 0, + CLK_TYPE2, + CLK_TYPE3, + CLK_TYPE4, + CLK_NONE, +}; + +/** + * enum qpnp_adc_decimation_type - Sampling rate supported. + * %DECIMATION_TYPE1: 512 + * %DECIMATION_TYPE2: 1K + * %DECIMATION_TYPE3: 2K + * %DECIMATION_TYPE4: 4k + * %DECIMATION_NONE: Do not use this Sampling type. + * + * The Sampling rate is specific to each channel of the QPNP ADC arbiter. + */ +enum qpnp_adc_decimation_type { + DECIMATION_TYPE1 = 0, + DECIMATION_TYPE2, + DECIMATION_TYPE3, + DECIMATION_TYPE4, + DECIMATION_NONE = 0xff, + + ADC_HC_DEC_RATIO_256 = 0, + ADC_HC_DEC_RATIO_512 = 1, + ADC_HC_DEC_RATIO_1024 = 2, + ADC_HC_DEC_RATIO_NONE = 0xff, +}; + +/** + * enum qpnp_adc_calib_type - QPNP ADC Calibration type. + * %ADC_CALIB_ABSOLUTE: Use 625mV and 1.25V reference channels. + * %ADC_CALIB_RATIOMETRIC: Use reference Voltage/GND. + * %ADC_CALIB_CONFIG_NONE: Do not use this calibration type. + * + * enum qpnp_adc_cal_sel - Selects the calibration type that is applied + * on the corresponding channel measurement after + * the ADC data is read. + * %ADC_HC_NO_CAL : To obtain raw, uncalibrated data on qpnp-vadc-hc type. + * %ADC_HC_RATIO_CAL : Applies ratiometric calibration. Note the calibration + * values stored in the CAL peripheral for VADC_VREF and + * VREF_1P25 already have GND_REF value removed. Used + * only with qpnp-vadc-hc type of VADC. + * %ADC_HC_ABS_CAL : Applies absolute calibration. Note the calibration + * values stored in the CAL peripheral for VADC_VREF and + * VREF_1P25 already have GND_REF value removed. Used + * only with qpnp-vadc-hc type of VADC. + * + * Use the input reference voltage depending on the calibration type + * to calcluate the offset and gain parameters. The calibration is + * specific to each channel of the QPNP ADC. + */ +enum qpnp_adc_calib_type { + CALIB_ABSOLUTE = 0, + CALIB_RATIOMETRIC, + CALIB_NONE, + + ADC_HC_NO_CAL = 0, + ADC_HC_RATIO_CAL = 1, + ADC_HC_ABS_CAL = 2, + ADC_HC_CAL_SEL_NONE, +}; + +/** + * enum qpnp_adc_channel_scaling_param - pre-scaling AMUX ratio. + * %CHAN_PATH_SCALING0: ratio of {1, 1} + * %CHAN_PATH_SCALING1: ratio of {1, 3} + * %CHAN_PATH_SCALING2: ratio of {1, 4} + * %CHAN_PATH_SCALING3: ratio of {1, 6} + * %CHAN_PATH_SCALING4: ratio of {1, 20} + * %CHAN_PATH_SCALING5: ratio of {1, 8} + * %CHAN_PATH_SCALING6: ratio of {10, 81} The actual ratio is (1/8.1). + * %CHAN_PATH_SCALING7: ratio of {1, 10} + * %CHAN_PATH_NONE: Do not use this pre-scaling ratio type. + * + * The pre-scaling is applied for signals to be within the voltage range + * of the ADC. + */ +enum qpnp_adc_channel_scaling_param { + PATH_SCALING0 = 0, + PATH_SCALING1, + PATH_SCALING2, + PATH_SCALING3, + PATH_SCALING4, + PATH_SCALING5, + PATH_SCALING6, + PATH_SCALING7, + PATH_SCALING_NONE, +}; + +/** + * enum qpnp_adc_scale_fn_type - Scaling function for pm8941 pre calibrated + * digital data relative to ADC reference. + * %SCALE_DEFAULT: Default scaling to convert raw adc code to voltage (uV). + * %SCALE_BATT_THERM: Conversion to temperature(decidegC) based on btm + * parameters. + * %SCALE_THERM_100K_PULLUP: Returns temperature in degC. + * Uses a mapping table with 100K pullup. + * %SCALE_PMIC_THERM: Returns result in milli degree's Centigrade. + * %SCALE_XOTHERM: Returns XO thermistor voltage in degree's Centigrade. + * %SCALE_THERM_150K_PULLUP: Returns temperature in degC. + * Uses a mapping table with 150K pullup. + * %SCALE_QRD_BATT_THERM: Conversion to temperature(decidegC) based on + * btm parameters. + * %SCALE_QRD_SKUAA_BATT_THERM: Conversion to temperature(decidegC) based on + * btm parameters for SKUAA. + * %SCALE_SMB_BATT_THERM: Conversion to temperature(decidegC) based on + * btm parameters for SMB. + * %SCALE_QRD_SKUG_BATT_THERM: Conversion to temperature(decidegC) based on + * btm parameters for SKUG. + * %SCALE_QRD_SKUH_BATT_THERM: Conversion to temperature(decidegC) based on + * btm parameters for SKUH + * %SCALE_QRD_SKUT1_BATT_THERM: Conversion to temperature(decidegC) based on + * btm parameters for SKUT1 + * %SCALE_PMI_CHG_TEMP: Conversion for PMI CHG temp + * %SCALE_NONE: Do not use this scaling type. + */ +enum qpnp_adc_scale_fn_type { + SCALE_DEFAULT = 0, + SCALE_BATT_THERM, + SCALE_THERM_100K_PULLUP, + SCALE_PMIC_THERM, + SCALE_XOTHERM, + SCALE_THERM_150K_PULLUP, + SCALE_QRD_BATT_THERM, + SCALE_QRD_SKUAA_BATT_THERM, + SCALE_SMB_BATT_THERM, + SCALE_QRD_SKUG_BATT_THERM, + SCALE_QRD_SKUH_BATT_THERM, + SCALE_NCP_03WF683_THERM, + SCALE_QRD_SKUT1_BATT_THERM, + SCALE_PMI_CHG_TEMP = 16, + SCALE_NONE, +}; + +/** + * enum qpnp_adc_tm_rscale_fn_type - Scaling function used to convert the + * channels input voltage/temperature to corresponding ADC code that is + * applied for thresholds. Check the corresponding channels scaling to + * determine the appropriate temperature/voltage units that are passed + * to the scaling function. Example battery follows the power supply + * framework that needs its units to be in decidegreesC so it passes + * deci-degreesC. PA_THERM clients pass the temperature in degrees. + * The order below should match the one in the driver for + * adc_tm_rscale_fn[]. + */ +enum qpnp_adc_tm_rscale_fn_type { + SCALE_R_VBATT = 0, + SCALE_RBATT_THERM, + SCALE_R_USB_ID, + SCALE_RPMIC_THERM, + SCALE_R_SMB_BATT_THERM, + SCALE_R_ABSOLUTE, + SCALE_QRD_SKUH_RBATT_THERM, + SCALE_QRD_SKUT1_RBATT_THERM, + SCALE_RSCALE_NONE, +}; + +/** + * enum qpnp_vadc_rscale_fn_type - Scaling function used to convert the + * channels input voltage/temperature to corresponding ADC code that is + * applied for thresholds. Check the corresponding channels scaling to + * determine the appropriate temperature/voltage units that are passed + * to the scaling function. The order below should match the one in the + * driver for qpnp_adc_scale_fn[]. + */ +enum qpnp_vadc_rscale_fn_type { + SCALE_RVADC_ABSOLUTE = 0, + SCALE_RVADC_SCALE_NONE, +}; + +/** + * enum qpnp_adc_fast_avg_ctl - Provides ability to obtain single result + * from the ADC that is an average of multiple measurement + * samples. Select number of samples for use in fast + * average mode (i.e. 2 ^ value). + * %ADC_FAST_AVG_SAMPLE_1: 0x0 = 1 + * %ADC_FAST_AVG_SAMPLE_2: 0x1 = 2 + * %ADC_FAST_AVG_SAMPLE_4: 0x2 = 4 + * %ADC_FAST_AVG_SAMPLE_8: 0x3 = 8 + * %ADC_FAST_AVG_SAMPLE_16: 0x4 = 16 + * %ADC_FAST_AVG_SAMPLE_32: 0x5 = 32 + * %ADC_FAST_AVG_SAMPLE_64: 0x6 = 64 + * %ADC_FAST_AVG_SAMPLE_128: 0x7 = 128 + * %ADC_FAST_AVG_SAMPLE_256: 0x8 = 256 + * %ADC_FAST_AVG_SAMPLE_512: 0x9 = 512 + */ +enum qpnp_adc_fast_avg_ctl { + ADC_FAST_AVG_SAMPLE_1 = 0, + ADC_FAST_AVG_SAMPLE_2, + ADC_FAST_AVG_SAMPLE_4, + ADC_FAST_AVG_SAMPLE_8, + ADC_FAST_AVG_SAMPLE_16, + ADC_FAST_AVG_SAMPLE_32, + ADC_FAST_AVG_SAMPLE_64, + ADC_FAST_AVG_SAMPLE_128, + ADC_FAST_AVG_SAMPLE_256, + ADC_FAST_AVG_SAMPLE_512, + ADC_FAST_AVG_SAMPLE_NONE, +}; + +/** + * enum qpnp_adc_hw_settle_time - Time between AMUX getting configured and + * the ADC starting conversion. Delay = 100us * value for + * value < 11 and 2ms * (value - 10) otherwise. + * %ADC_CHANNEL_HW_SETTLE_DELAY_0US: 0us + * %ADC_CHANNEL_HW_SETTLE_DELAY_100US: 100us + * %ADC_CHANNEL_HW_SETTLE_DELAY_200US: 200us + * %ADC_CHANNEL_HW_SETTLE_DELAY_300US: 300us + * %ADC_CHANNEL_HW_SETTLE_DELAY_400US: 400us + * %ADC_CHANNEL_HW_SETTLE_DELAY_500US: 500us + * %ADC_CHANNEL_HW_SETTLE_DELAY_600US: 600us + * %ADC_CHANNEL_HW_SETTLE_DELAY_700US: 700us + * %ADC_CHANNEL_HW_SETTLE_DELAY_800US: 800us + * %ADC_CHANNEL_HW_SETTLE_DELAY_900US: 900us + * %ADC_CHANNEL_HW_SETTLE_DELAY_1MS: 1ms + * %ADC_CHANNEL_HW_SETTLE_DELAY_2MS: 2ms + * %ADC_CHANNEL_HW_SETTLE_DELAY_4MS: 4ms + * %ADC_CHANNEL_HW_SETTLE_DELAY_6MS: 6ms + * %ADC_CHANNEL_HW_SETTLE_DELAY_8MS: 8ms + * %ADC_CHANNEL_HW_SETTLE_DELAY_10MS: 10ms + * %ADC_CHANNEL_HW_SETTLE_NONE + */ +enum qpnp_adc_hw_settle_time { + ADC_CHANNEL_HW_SETTLE_DELAY_0US = 0, + ADC_CHANNEL_HW_SETTLE_DELAY_100US, + ADC_CHANNEL_HW_SETTLE_DELAY_2000US, + ADC_CHANNEL_HW_SETTLE_DELAY_300US, + ADC_CHANNEL_HW_SETTLE_DELAY_400US, + ADC_CHANNEL_HW_SETTLE_DELAY_500US, + ADC_CHANNEL_HW_SETTLE_DELAY_600US, + ADC_CHANNEL_HW_SETTLE_DELAY_700US, + ADC_CHANNEL_HW_SETTLE_DELAY_800US, + ADC_CHANNEL_HW_SETTLE_DELAY_900US, + ADC_CHANNEL_HW_SETTLE_DELAY_1MS, + ADC_CHANNEL_HW_SETTLE_DELAY_2MS, + ADC_CHANNEL_HW_SETTLE_DELAY_4MS, + ADC_CHANNEL_HW_SETTLE_DELAY_6MS, + ADC_CHANNEL_HW_SETTLE_DELAY_8MS, + ADC_CHANNEL_HW_SETTLE_DELAY_10MS, + ADC_CHANNEL_HW_SETTLE_NONE, +}; + +/** + * enum qpnp_adc_dec_ratio_sel - Selects the decimation ratio of the ADC. + * Support values are 256, 512 and 1024. + */ +enum qpnp_vadc_dec_ratio_sel { + ADC_DEC_RATIO_256 = 0, + ADC_DEC_RATIO_512, + ADC_DEC_RATIO_1024, + ADC_DEC_RATIO_NONE, +}; + +/** + * enum qpnp_adc_cal_sel - Selects the calibration type that is applied + * on the corresponding channel measurement after + * the ADC data is read. + * %ADC_NO_CAL : To obtain raw, uncalibrated data. + * %ADC_RATIO_CAL : Applies ratiometric calibration. Note the calibration + * values stored in the CAL peripheral for VADC_VREF and + * VREF_1P25 already have GND_REF value removed. + * %ADC_ABS_CAL : Applies absolute calibration. Note the calibration + * values stored in the CAL peripheral for VADC_VREF and + * VREF_1P25 already have GND_REF value removed. + */ + +/** + * enum qpnp_adc_cal_val - Selects if the calibration values applied + * are the ones when collected on a timer interval + * or if an immediate calibration needs to be forced. + * %ADC_TIMER_CAL : Uses calibration value collected on the timer interval. + * %ADC_NEW_CAL : Forces an immediate calibration. Use only when necessary + * since it forces 3 calibration measurements in addition to + * the channel measurement. For most measurement, using + * calibration based on the timer interval is sufficient. + */ +enum qpnp_adc_cal_val { + ADC_TIMER_CAL = 0, + ADC_NEW_CAL, + ADC_CAL_VAL_NONE, +}; + +/** + * enum qpnp_vadc_mode_sel - Selects the basic mode of operation. + * - The normal mode is used for single measurement. + * - The Conversion sequencer is used to trigger an + * ADC read when a HW trigger is selected. + * - The measurement interval performs a single or + * continous measurement at a specified interval/delay. + * %ADC_OP_NORMAL_MODE : Normal mode used for single measurement. + * %ADC_OP_CONVERSION_SEQUENCER : Conversion sequencer used to trigger + * an ADC read on a HW supported trigger. + * Refer to enum qpnp_vadc_trigger for + * supported HW triggers. + * %ADC_OP_MEASUREMENT_INTERVAL : The measurement interval performs a + * single or continous measurement after a specified delay. + * For delay look at qpnp_adc_meas_timer. + */ +enum qpnp_vadc_mode_sel { + ADC_OP_NORMAL_MODE = 0, + ADC_OP_CONVERSION_SEQUENCER, + ADC_OP_MEASUREMENT_INTERVAL, + ADC_OP_MODE_NONE, +}; + +/** + * enum qpnp_vadc_trigger - Select the HW trigger to be used while + * measuring the ADC reading. + * %ADC_GSM_PA_ON : GSM power amplifier on. + * %ADC_TX_GTR_THRES : Transmit power greater than threshold. + * %ADC_CAMERA_FLASH_RAMP : Flash ramp up done. + * %ADC_DTEST : DTEST. + */ +enum qpnp_vadc_trigger { + ADC_GSM_PA_ON = 0, + ADC_TX_GTR_THRES, + ADC_CAMERA_FLASH_RAMP, + ADC_DTEST, + ADC_SEQ_NONE, +}; + +/** + * enum qpnp_vadc_conv_seq_timeout - Select delay (0 to 15ms) from + * conversion request to triggering conversion sequencer + * hold off time. + */ +enum qpnp_vadc_conv_seq_timeout { + ADC_CONV_SEQ_TIMEOUT_0MS = 0, + ADC_CONV_SEQ_TIMEOUT_1MS, + ADC_CONV_SEQ_TIMEOUT_2MS, + ADC_CONV_SEQ_TIMEOUT_3MS, + ADC_CONV_SEQ_TIMEOUT_4MS, + ADC_CONV_SEQ_TIMEOUT_5MS, + ADC_CONV_SEQ_TIMEOUT_6MS, + ADC_CONV_SEQ_TIMEOUT_7MS, + ADC_CONV_SEQ_TIMEOUT_8MS, + ADC_CONV_SEQ_TIMEOUT_9MS, + ADC_CONV_SEQ_TIMEOUT_10MS, + ADC_CONV_SEQ_TIMEOUT_11MS, + ADC_CONV_SEQ_TIMEOUT_12MS, + ADC_CONV_SEQ_TIMEOUT_13MS, + ADC_CONV_SEQ_TIMEOUT_14MS, + ADC_CONV_SEQ_TIMEOUT_15MS, + ADC_CONV_SEQ_TIMEOUT_NONE, +}; + +/** + * enum qpnp_adc_conv_seq_holdoff - Select delay from conversion + * trigger signal (i.e. adc_conv_seq_trig) transition + * to ADC enable. Delay = 25us * (value + 1). + */ +enum qpnp_adc_conv_seq_holdoff { + ADC_SEQ_HOLD_25US = 0, + ADC_SEQ_HOLD_50US, + ADC_SEQ_HOLD_75US, + ADC_SEQ_HOLD_100US, + ADC_SEQ_HOLD_125US, + ADC_SEQ_HOLD_150US, + ADC_SEQ_HOLD_175US, + ADC_SEQ_HOLD_200US, + ADC_SEQ_HOLD_225US, + ADC_SEQ_HOLD_250US, + ADC_SEQ_HOLD_275US, + ADC_SEQ_HOLD_300US, + ADC_SEQ_HOLD_325US, + ADC_SEQ_HOLD_350US, + ADC_SEQ_HOLD_375US, + ADC_SEQ_HOLD_400US, + ADC_SEQ_HOLD_NONE, +}; + +/** + * enum qpnp_adc_conv_seq_state - Conversion sequencer operating state + * %ADC_CONV_SEQ_IDLE : Sequencer is in idle. + * %ADC_CONV_TRIG_RISE : Waiting for rising edge trigger. + * %ADC_CONV_TRIG_HOLDOFF : Waiting for rising trigger hold off time. + * %ADC_CONV_MEAS_RISE : Measuring selected ADC signal. + * %ADC_CONV_TRIG_FALL : Waiting for falling trigger edge. + * %ADC_CONV_FALL_HOLDOFF : Waiting for falling trigger hold off time. + * %ADC_CONV_MEAS_FALL : Measuring selected ADC signal. + * %ADC_CONV_ERROR : Aberrant Hardware problem. + */ +enum qpnp_adc_conv_seq_state { + ADC_CONV_SEQ_IDLE = 0, + ADC_CONV_TRIG_RISE, + ADC_CONV_TRIG_HOLDOFF, + ADC_CONV_MEAS_RISE, + ADC_CONV_TRIG_FALL, + ADC_CONV_FALL_HOLDOFF, + ADC_CONV_MEAS_FALL, + ADC_CONV_ERROR, + ADC_CONV_NONE, +}; + +/** + * enum qpnp_adc_meas_timer_1 - Selects the measurement interval time. + * If value = 0, use 0ms else use 2^(value + 4)/ 32768). + * The timer period is used by the USB_ID. Do not set a polling rate + * greater than 1 second on PMIC 2.0. The max polling rate on the PMIC 2.0 + * appears to be limited to 1 second. + * %ADC_MEAS_INTERVAL_0MS : 0ms + * %ADC_MEAS_INTERVAL_1P0MS : 1ms + * %ADC_MEAS_INTERVAL_2P0MS : 2ms + * %ADC_MEAS_INTERVAL_3P9MS : 3.9ms + * %ADC_MEAS_INTERVAL_7P8MS : 7.8ms + * %ADC_MEAS_INTERVAL_15P6MS : 15.6ms + * %ADC_MEAS_INTERVAL_31P3MS : 31.3ms + * %ADC_MEAS_INTERVAL_62P5MS : 62.5ms + * %ADC_MEAS_INTERVAL_125MS : 125ms + * %ADC_MEAS_INTERVAL_250MS : 250ms + * %ADC_MEAS_INTERVAL_500MS : 500ms + * %ADC_MEAS_INTERVAL_1S : 1seconds + * %ADC_MEAS_INTERVAL_2S : 2seconds + * %ADC_MEAS_INTERVAL_4S : 4seconds + * %ADC_MEAS_INTERVAL_8S : 8seconds + * %ADC_MEAS_INTERVAL_16S: 16seconds + */ +enum qpnp_adc_meas_timer_1 { + ADC_MEAS1_INTERVAL_0MS = 0, + ADC_MEAS1_INTERVAL_1P0MS, + ADC_MEAS1_INTERVAL_2P0MS, + ADC_MEAS1_INTERVAL_3P9MS, + ADC_MEAS1_INTERVAL_7P8MS, + ADC_MEAS1_INTERVAL_15P6MS, + ADC_MEAS1_INTERVAL_31P3MS, + ADC_MEAS1_INTERVAL_62P5MS, + ADC_MEAS1_INTERVAL_125MS, + ADC_MEAS1_INTERVAL_250MS, + ADC_MEAS1_INTERVAL_500MS, + ADC_MEAS1_INTERVAL_1S, + ADC_MEAS1_INTERVAL_2S, + ADC_MEAS1_INTERVAL_4S, + ADC_MEAS1_INTERVAL_8S, + ADC_MEAS1_INTERVAL_16S, + ADC_MEAS1_INTERVAL_NONE, +}; + +/** + * enum qpnp_adc_meas_timer_2 - Selects the measurement interval time. + * If value = 0, use 0ms else use 2^(value + 4)/ 32768). + * The timer period is used by the batt_therm. Do not set a polling rate + * greater than 1 second on PMIC 2.0. The max polling rate on the PMIC 2.0 + * appears to be limited to 1 second. + * %ADC_MEAS_INTERVAL_0MS : 0ms + * %ADC_MEAS_INTERVAL_100MS : 100ms + * %ADC_MEAS_INTERVAL_200MS : 200ms + * %ADC_MEAS_INTERVAL_300MS : 300ms + * %ADC_MEAS_INTERVAL_400MS : 400ms + * %ADC_MEAS_INTERVAL_500MS : 500ms + * %ADC_MEAS_INTERVAL_600MS : 600ms + * %ADC_MEAS_INTERVAL_700MS : 700ms + * %ADC_MEAS_INTERVAL_800MS : 800ms + * %ADC_MEAS_INTERVAL_900MS : 900ms + * %ADC_MEAS_INTERVAL_1S: 1seconds + * %ADC_MEAS_INTERVAL_1P1S: 1.1seconds + * %ADC_MEAS_INTERVAL_1P2S: 1.2seconds + * %ADC_MEAS_INTERVAL_1P3S: 1.3seconds + * %ADC_MEAS_INTERVAL_1P4S: 1.4seconds + * %ADC_MEAS_INTERVAL_1P5S: 1.5seconds + */ +enum qpnp_adc_meas_timer_2 { + ADC_MEAS2_INTERVAL_0MS = 0, + ADC_MEAS2_INTERVAL_100MS, + ADC_MEAS2_INTERVAL_200MS, + ADC_MEAS2_INTERVAL_300MS, + ADC_MEAS2_INTERVAL_400MS, + ADC_MEAS2_INTERVAL_500MS, + ADC_MEAS2_INTERVAL_600MS, + ADC_MEAS2_INTERVAL_700MS, + ADC_MEAS2_INTERVAL_800MS, + ADC_MEAS2_INTERVAL_900MS, + ADC_MEAS2_INTERVAL_1S, + ADC_MEAS2_INTERVAL_1P1S, + ADC_MEAS2_INTERVAL_1P2S, + ADC_MEAS2_INTERVAL_1P3S, + ADC_MEAS2_INTERVAL_1P4S, + ADC_MEAS2_INTERVAL_1P5S, + ADC_MEAS2_INTERVAL_NONE, +}; + +/** + * enum qpnp_adc_meas_timer_3 - Selects the measurement interval time. + * If value = 0, use 0ms else use 2^(value + 4)/ 32768). + * Do not set a polling rate greater than 1 second on PMIC 2.0. + * The max polling rate on the PMIC 2.0 appears to be limited to 1 second. + * %ADC_MEAS_INTERVAL_0MS : 0ms + * %ADC_MEAS_INTERVAL_1S : 1seconds + * %ADC_MEAS_INTERVAL_2S : 2seconds + * %ADC_MEAS_INTERVAL_3S : 3seconds + * %ADC_MEAS_INTERVAL_4S : 4seconds + * %ADC_MEAS_INTERVAL_5S : 5seconds + * %ADC_MEAS_INTERVAL_6S: 6seconds + * %ADC_MEAS_INTERVAL_7S : 7seconds + * %ADC_MEAS_INTERVAL_8S : 8seconds + * %ADC_MEAS_INTERVAL_9S : 9seconds + * %ADC_MEAS_INTERVAL_10S : 10seconds + * %ADC_MEAS_INTERVAL_11S : 11seconds + * %ADC_MEAS_INTERVAL_12S : 12seconds + * %ADC_MEAS_INTERVAL_13S : 13seconds + * %ADC_MEAS_INTERVAL_14S : 14seconds + * %ADC_MEAS_INTERVAL_15S : 15seconds + */ +enum qpnp_adc_meas_timer_3 { + ADC_MEAS3_INTERVAL_0S = 0, + ADC_MEAS3_INTERVAL_1S, + ADC_MEAS3_INTERVAL_2S, + ADC_MEAS3_INTERVAL_3S, + ADC_MEAS3_INTERVAL_4S, + ADC_MEAS3_INTERVAL_5S, + ADC_MEAS3_INTERVAL_6S, + ADC_MEAS3_INTERVAL_7S, + ADC_MEAS3_INTERVAL_8S, + ADC_MEAS3_INTERVAL_9S, + ADC_MEAS3_INTERVAL_10S, + ADC_MEAS3_INTERVAL_11S, + ADC_MEAS3_INTERVAL_12S, + ADC_MEAS3_INTERVAL_13S, + ADC_MEAS3_INTERVAL_14S, + ADC_MEAS3_INTERVAL_15S, + ADC_MEAS3_INTERVAL_NONE, +}; + +/** + * enum qpnp_adc_meas_timer_select - Selects the timer for which + * the appropriate polling frequency is set. + * %ADC_MEAS_TIMER_SELECT1 - Select this timer for measurement polling interval + * for 1 second. + * %ADC_MEAS_TIMER_SELECT2 - Select this timer for 500ms measurement interval. + * %ADC_MEAS_TIMER_SELECT3 - Select this timer for 5 second interval. + */ +enum qpnp_adc_meas_timer_select { + ADC_MEAS_TIMER_SELECT1 = 0, + ADC_MEAS_TIMER_SELECT2, + ADC_MEAS_TIMER_SELECT3, + ADC_MEAS_TIMER_NUM, +}; + +/** + * enum qpnp_adc_meas_interval_op_ctl - Select operating mode. + * %ADC_MEAS_INTERVAL_OP_SINGLE : Conduct single measurement at specified time + * delay. + * %ADC_MEAS_INTERVAL_OP_CONTINUOUS : Make measurements at measurement interval + * times. + */ +enum qpnp_adc_meas_interval_op_ctl { + ADC_MEAS_INTERVAL_OP_SINGLE = 0, + ADC_MEAS_INTERVAL_OP_CONTINUOUS, + ADC_MEAS_INTERVAL_OP_NONE, +}; + +/** + * Channel selection registers for each of the configurable measurements + * Channels allotment is set at device config for a channel. + * The USB_ID, BATT_THERM, PMIC_THERM and VBAT channels are used by the + * kernel space USB, Battery and IADC drivers. + * The other 3 channels are configurable for use by userspace clients. + */ +enum qpnp_adc_tm_channel_select { + QPNP_ADC_TM_M0_ADC_CH_SEL_CTL = 0x48, + QPNP_ADC_TM_M1_ADC_CH_SEL_CTL = 0x68, + QPNP_ADC_TM_M2_ADC_CH_SEL_CTL = 0x70, + QPNP_ADC_TM_M3_ADC_CH_SEL_CTL = 0x78, + QPNP_ADC_TM_M4_ADC_CH_SEL_CTL = 0x80, + QPNP_ADC_TM_M5_ADC_CH_SEL_CTL = 0x88, + QPNP_ADC_TM_M6_ADC_CH_SEL_CTL = 0x90, + QPNP_ADC_TM_M7_ADC_CH_SEL_CTL = 0x98, + QPNP_ADC_TM_CH_SELECT_NONE +}; + +/** + * Channel index for the corresponding index to qpnp_adc_tm_channel_selec + */ +enum qpnp_adc_tm_channel_num { + QPNP_ADC_TM_CHAN0 = 0, + QPNP_ADC_TM_CHAN1, + QPNP_ADC_TM_CHAN2, + QPNP_ADC_TM_CHAN3, + QPNP_ADC_TM_CHAN4, + QPNP_ADC_TM_CHAN5, + QPNP_ADC_TM_CHAN6, + QPNP_ADC_TM_CHAN7, + QPNP_ADC_TM_CHAN_NONE +}; + +enum qpnp_comp_scheme_type { + COMP_ID_GF = 0, + COMP_ID_SMIC, + COMP_ID_TSMC, + COMP_ID_NUM, +}; + +/** + * struct qpnp_adc_tm_config - Represent ADC Thermal Monitor configuration. + * @channel: ADC channel for which thermal monitoring is requested. + * @adc_code: The pre-calibrated digital output of a given ADC releative to the + * ADC reference. + * @high_thr_temp: Temperature at which high threshold notification is required. + * @low_thr_temp: Temperature at which low threshold notification is required. + * @low_thr_voltage : Low threshold voltage ADC code used for reverse + * calibration. + * @high_thr_voltage: High threshold voltage ADC code used for reverse + * calibration. + */ +struct qpnp_adc_tm_config { + int channel; + int adc_code; + int high_thr_temp; + int low_thr_temp; + int64_t high_thr_voltage; + int64_t low_thr_voltage; +}; + +/** + * enum qpnp_adc_tm_trip_type - Type for setting high/low temperature/voltage. + * %ADC_TM_TRIP_HIGH_WARM: Setting high temperature. Note that high temperature + * corresponds to low voltage. Driver handles this case + * appropriately to set high/low thresholds for voltage. + * threshold. + * %ADC_TM_TRIP_LOW_COOL: Setting low temperature. + */ +enum qpnp_adc_tm_trip_type { + ADC_TM_TRIP_HIGH_WARM = 0, + ADC_TM_TRIP_LOW_COOL, + ADC_TM_TRIP_NUM, +}; + +#define ADC_TM_WRITABLE_TRIPS_MASK ((1 << ADC_TM_TRIP_NUM) - 1) + +/** + * enum qpnp_tm_state - This lets the client know whether the threshold + * that was crossed was high/low. + * %ADC_TM_HIGH_STATE: Client is notified of crossing the requested high + * voltage threshold. + * %ADC_TM_COOL_STATE: Client is notified of crossing the requested cool + * temperature threshold. + * %ADC_TM_LOW_STATE: Client is notified of crossing the requested low + * voltage threshold. + * %ADC_TM_WARM_STATE: Client is notified of crossing the requested high + * temperature threshold. + */ +enum qpnp_tm_state { + ADC_TM_HIGH_STATE = 0, + ADC_TM_COOL_STATE = ADC_TM_HIGH_STATE, + ADC_TM_LOW_STATE, + ADC_TM_WARM_STATE = ADC_TM_LOW_STATE, + ADC_TM_STATE_NUM, +}; + +/** + * enum qpnp_state_request - Request to enable/disable the corresponding + * high/low voltage/temperature thresholds. + * %ADC_TM_HIGH_THR_ENABLE: Enable high voltage threshold. + * %ADC_TM_COOL_THR_ENABLE = Enables cool temperature threshold. + * %ADC_TM_LOW_THR_ENABLE: Enable low voltage/temperature threshold. + * %ADC_TM_WARM_THR_ENABLE = Enables warm temperature threshold. + * %ADC_TM_HIGH_LOW_THR_ENABLE: Enable high and low voltage/temperature + * threshold. + * %ADC_TM_HIGH_THR_DISABLE: Disable high voltage/temperature threshold. + * %ADC_TM_COOL_THR_ENABLE = Disables cool temperature threshold. + * %ADC_TM_LOW_THR_DISABLE: Disable low voltage/temperature threshold. + * %ADC_TM_WARM_THR_ENABLE = Disables warm temperature threshold. + * %ADC_TM_HIGH_THR_DISABLE: Disable high and low voltage/temperature + * threshold. + */ +enum qpnp_state_request { + ADC_TM_HIGH_THR_ENABLE = 0, + ADC_TM_COOL_THR_ENABLE = ADC_TM_HIGH_THR_ENABLE, + ADC_TM_LOW_THR_ENABLE, + ADC_TM_WARM_THR_ENABLE = ADC_TM_LOW_THR_ENABLE, + ADC_TM_HIGH_LOW_THR_ENABLE, + ADC_TM_HIGH_THR_DISABLE, + ADC_TM_COOL_THR_DISABLE = ADC_TM_HIGH_THR_DISABLE, + ADC_TM_LOW_THR_DISABLE, + ADC_TM_WARM_THR_DISABLE = ADC_TM_LOW_THR_DISABLE, + ADC_TM_HIGH_LOW_THR_DISABLE, + ADC_TM_THR_NUM, +}; + +/** + * struct qpnp_adc_tm_btm_param - Represent Battery temperature threshold + * monitoring configuration. + * @high_temp: High temperature threshold for which notification is requested. + * @low_temp: Low temperature threshold for which notification is requested. + * @high_thr_voltage: High voltage for which notification is requested. + * @low_thr_voltage: Low voltage for which notification is requested. + * @state_request: Enable/disable the corresponding high and low temperature + * thresholds. + * @timer_interval1: Select polling rate from qpnp_adc_meas_timer_1 type. + * @timer_interval2: Select polling rate from qpnp_adc_meas_timer_2 type. + * @timer_interval3: Select polling rate from qpnp_adc_meas_timer_3 type. + * @btmid_ctx: A context of void type. + * @threshold_notification: Notification callback once threshold are crossed. + * units to be used for High/Low temperature and voltage notification - + * This depends on the clients usage. Check the rscaling function + * for the appropriate channel nodes. + * @Batt therm clients temperature units is decidegreesCentigrate. + * @USB_ID inputs the voltage units in milli-volts. + * @PA_THERM inputs the units in degC. + * @PMIC_THERM inputs the units in millidegC. + */ +struct qpnp_adc_tm_btm_param { + int32_t high_temp; + int32_t low_temp; + int32_t high_thr; + int32_t low_thr; + int32_t gain_num; + int32_t gain_den; + enum qpnp_vadc_channels channel; + enum qpnp_state_request state_request; + enum qpnp_adc_meas_timer_1 timer_interval; + enum qpnp_adc_meas_timer_2 timer_interval2; + enum qpnp_adc_meas_timer_3 timer_interval3; + void *btm_ctx; + void (*threshold_notification)(enum qpnp_tm_state state, + void *ctx); +}; + +/** + * struct qpnp_vadc_linear_graph - Represent ADC characteristics. + * @dy: Numerator slope to calculate the gain. + * @dx: Denominator slope to calculate the gain. + * @adc_vref: A/D word of the voltage reference used for the channel. + * @adc_gnd: A/D word of the ground reference used for the channel. + * + * Each ADC device has different offset and gain parameters which are computed + * to calibrate the device. + */ +struct qpnp_vadc_linear_graph { + int64_t dy; + int64_t dx; + int64_t adc_vref; + int64_t adc_gnd; +}; + +/** + * struct qpnp_vadc_map_pt - Map the graph representation for ADC channel + * @x: Represent the ADC digitized code. + * @y: Represent the physical data which can be temperature, voltage, + * resistance. + */ +struct qpnp_vadc_map_pt { + int32_t x; + int32_t y; +}; + +/** + * struct qpnp_vadc_scaling_ratio - Represent scaling ratio for adc input. + * @num: Numerator scaling parameter. + * @den: Denominator scaling parameter. + */ +struct qpnp_vadc_scaling_ratio { + int32_t num; + int32_t den; +}; + +/** + * struct qpnp_adc_properties - Represent the ADC properties. + * @adc_reference: Reference voltage for QPNP ADC. + * @bitresolution: ADC bit resolution for QPNP ADC. + * @biploar: Polarity for QPNP ADC. + * @adc_hc: Represents using HC variant of the ADC controller. + */ +struct qpnp_adc_properties { + uint32_t adc_vdd_reference; + uint32_t bitresolution; + bool bipolar; + bool adc_hc; +}; + +/** + * struct qpnp_vadc_chan_properties - Represent channel properties of the ADC. + * @offset_gain_numerator: The inverse numerator of the gain applied to the + * input channel. + * @offset_gain_denominator: The inverse denominator of the gain applied to the + * input channel. + * @high_thr: High threshold voltage that is requested to be set. + * @low_thr: Low threshold voltage that is requested to be set. + * @timer_select: Choosen from one of the 3 timers to set the polling rate for + * the VADC_BTM channel. + * @meas_interval1: Polling rate to set for timer 1. + * @meas_interval2: Polling rate to set for timer 2. + * @tm_channel_select: BTM channel number for the 5 VADC_BTM channels. + * @state_request: User can select either enable or disable high/low or both + * activation levels based on the qpnp_state_request type. + * @adc_graph: ADC graph for the channel of struct type qpnp_adc_linear_graph. + */ +struct qpnp_vadc_chan_properties { + uint32_t offset_gain_numerator; + uint32_t offset_gain_denominator; + uint32_t high_thr; + uint32_t low_thr; + enum qpnp_adc_meas_timer_select timer_select; + enum qpnp_adc_meas_timer_1 meas_interval1; + enum qpnp_adc_meas_timer_2 meas_interval2; + enum qpnp_adc_tm_channel_select tm_channel_select; + enum qpnp_state_request state_request; + enum qpnp_adc_calib_type calib_type; + struct qpnp_vadc_linear_graph adc_graph[2]; +}; + +/** + * struct qpnp_vadc_result - Represent the result of the QPNP ADC. + * @chan: The channel number of the requested conversion. + * @adc_code: The pre-calibrated digital output of a given ADC relative to the + * the ADC reference. + * @measurement: In units specific for a given ADC; most ADC uses reference + * voltage but some ADC uses reference current. This measurement + * here is a number relative to a reference of a given ADC. + * @physical: The data meaningful for each individual channel whether it is + * voltage, current, temperature, etc. + * All voltage units are represented in micro - volts. + * -Battery temperature units are represented as 0.1 DegC. + * -PA Therm temperature units are represented as DegC. + * -PMIC Die temperature units are represented as 0.001 DegC. + */ +struct qpnp_vadc_result { + uint32_t chan; + int32_t adc_code; + int64_t measurement; + int64_t physical; +}; + +/** + * struct qpnp_adc_amux - AMUX properties for individual channel + * @name: Channel string name. + * @channel_num: Channel in integer used from qpnp_adc_channels. + * @chan_path_prescaling: Channel scaling performed on the input signal. + * @adc_decimation: Sampling rate desired for the channel. + * adc_scale_fn: Scaling function to convert to the data meaningful for + * each individual channel whether it is voltage, current, + * temperature, etc and compensates the channel properties. + */ +struct qpnp_adc_amux { + char *name; + enum qpnp_vadc_channels channel_num; + enum qpnp_adc_channel_scaling_param chan_path_prescaling; + enum qpnp_adc_decimation_type adc_decimation; + enum qpnp_adc_scale_fn_type adc_scale_fn; + enum qpnp_adc_fast_avg_ctl fast_avg_setup; + enum qpnp_adc_hw_settle_time hw_settle_time; + enum qpnp_adc_calib_type calib_type; + enum qpnp_adc_cal_val cal_val; +}; + +/** + * struct qpnp_vadc_scaling_ratio + * + */ +static const struct qpnp_vadc_scaling_ratio qpnp_vadc_amux_scaling_ratio[] = { + {1, 1}, + {1, 3}, + {1, 4}, + {1, 6}, + {1, 20}, + {1, 8}, + {10, 81}, + {1, 10} +}; + +/** + * struct qpnp_vadc_scale_fn - Scaling function prototype + * @chan: Function pointer to one of the scaling functions + * which takes the adc properties, channel properties, + * and returns the physical result + */ +struct qpnp_vadc_scale_fn { + int32_t (*chan)(struct qpnp_vadc_chip *, int32_t, + const struct qpnp_adc_properties *, + const struct qpnp_vadc_chan_properties *, + struct qpnp_vadc_result *); +}; + +/** + * struct qpnp_adc_tm_reverse_scale_fn - Reverse scaling prototype + * @chan: Function pointer to one of the scaling functions + * which takes the adc properties, channel properties, + * and returns the physical result + */ +struct qpnp_adc_tm_reverse_scale_fn { + int32_t (*chan)(struct qpnp_vadc_chip *, + struct qpnp_adc_tm_btm_param *, + uint32_t *, uint32_t *); +}; + +/** + * struct qpnp_vadc_rscale_fn - Scaling function prototype + * @chan: Function pointer to one of the scaling functions + * which takes the adc properties, channel properties, + * and returns the physical result + */ +struct qpnp_vadc_rscale_fn { + int32_t (*chan)(struct qpnp_vadc_chip *, + const struct qpnp_vadc_chan_properties *, + struct qpnp_adc_tm_btm_param *, + uint32_t *, uint32_t *); +}; + +/** + * struct qpnp_iadc_calib - IADC channel calibration structure. + * @channel - Channel for which the historical offset and gain is + * calculated. Available channels are internal rsense, + * external rsense and alternate lead pairs. + * @offset_raw - raw Offset value for the channel. + * @gain_raw - raw Gain of the channel. + * @ideal_offset_uv - ideal offset value for the channel. + * @ideal_gain_nv - ideal gain for the channel. + * @offset_uv - converted value of offset in uV. + * @gain_uv - converted value of gain in uV. + */ +struct qpnp_iadc_calib { + enum qpnp_iadc_channels channel; + uint16_t offset_raw; + uint16_t gain_raw; + uint32_t ideal_offset_uv; + uint32_t ideal_gain_nv; + uint32_t offset_uv; + uint32_t gain_uv; +}; + +/** + * struct qpnp_iadc_result - IADC read result structure. + * @oresult_uv - Result of ADC in uV. + * @result_ua - Result of ADC in uA. + */ +struct qpnp_iadc_result { + int32_t result_uv; + int32_t result_ua; +}; + +/** + * struct qpnp_adc_drv - QPNP ADC device structure. + * @spmi - spmi device for ADC peripheral. + * @offset - base offset for the ADC peripheral. + * @adc_prop - ADC properties specific to the ADC peripheral. + * @amux_prop - AMUX properties representing the ADC peripheral. + * @adc_channels - ADC channel properties for the ADC peripheral. + * @adc_irq_eoc - End of Conversion IRQ. + * @adc_irq_fifo_not_empty - Conversion sequencer request written + * to FIFO when not empty. + * @adc_irq_conv_seq_timeout - Conversion sequencer trigger timeout. + * @adc_high_thr_irq - Output higher than high threshold set for measurement. + * @adc_low_thr_irq - Output lower than low threshold set for measurement. + * @adc_lock - ADC lock for access to the peripheral. + * @adc_rslt_completion - ADC result notification after interrupt + * is received. + * @calib - Internal rsens calibration values for gain and offset. + */ +struct qpnp_adc_drv { + struct spmi_device *spmi; + uint8_t slave; + uint16_t offset; + struct qpnp_adc_properties *adc_prop; + struct qpnp_adc_amux_properties *amux_prop; + struct qpnp_adc_amux *adc_channels; + int adc_irq_eoc; + int adc_irq_fifo_not_empty; + int adc_irq_conv_seq_timeout; + int adc_high_thr_irq; + int adc_low_thr_irq; + struct mutex adc_lock; + struct completion adc_rslt_completion; + struct qpnp_iadc_calib calib; + struct regulator *hkadc_ldo; + struct regulator *hkadc_ldo_ok; + bool adc_hc; +}; + +/** + * struct qpnp_adc_amux_properties - QPNP VADC amux channel property. + * @amux_channel - Refer to the qpnp_vadc_channel list. + * @decimation - Sampling rate supported for the channel. + * @mode_sel - The basic mode of operation. + * @hw_settle_time - The time between AMUX being configured and the + * start of conversion. + * @fast_avg_setup - Ability to provide single result from the ADC + * that is an average of multiple measurements. + * @trigger_channel - HW trigger channel for conversion sequencer. + * @chan_prop - Represent the channel properties of the ADC. + */ +struct qpnp_adc_amux_properties { + uint32_t amux_channel; + uint32_t decimation; + uint32_t mode_sel; + uint32_t hw_settle_time; + uint32_t fast_avg_setup; + enum qpnp_vadc_trigger trigger_channel; + struct qpnp_vadc_chan_properties chan_prop[0]; +}; + +/* SW index's for PMIC type and version used by QPNP VADC and IADC */ +#define QPNP_REV_ID_8941_3_1 1 +#define QPNP_REV_ID_8026_1_0 2 +#define QPNP_REV_ID_8026_2_0 3 +#define QPNP_REV_ID_8110_1_0 4 +#define QPNP_REV_ID_8026_2_1 5 +#define QPNP_REV_ID_8110_2_0 6 +#define QPNP_REV_ID_8026_2_2 7 +#define QPNP_REV_ID_8941_3_0 8 +#define QPNP_REV_ID_8941_2_0 9 +#define QPNP_REV_ID_8916_1_0 10 +#define QPNP_REV_ID_8916_1_1 11 +#define QPNP_REV_ID_8916_2_0 12 +#define QPNP_REV_ID_8909_1_0 13 +#define QPNP_REV_ID_8909_1_1 14 +#define QPNP_REV_ID_PM8950_1_0 16 + +/* Public API */ +#if defined(CONFIG_SENSORS_QPNP_ADC_VOLTAGE) \ + || defined(CONFIG_SENSORS_QPNP_ADC_VOLTAGE_MODULE) +/** + * qpnp_vadc_read() - Performs ADC read on the channel. + * @dev: Structure device for qpnp vadc + * @channel: Input channel to perform the ADC read. + * @result: Structure pointer of type adc_chan_result + * in which the ADC read results are stored. + */ +int32_t qpnp_vadc_read(struct qpnp_vadc_chip *dev, + enum qpnp_vadc_channels channel, + struct qpnp_vadc_result *result); + +/** + * qpnp_vadc_hc_read() - Performs ADC read on the channel. + * It uses the refreshed VADC design from qpnp-vadc-hc. + * @dev: Structure device for qpnp vadc + * @channel: Input channel to perform the ADC read. + * @result: Structure pointer of type adc_chan_result + * in which the ADC read results are stored. + */ +int32_t qpnp_vadc_hc_read(struct qpnp_vadc_chip *dev, + enum qpnp_vadc_channels channel, + struct qpnp_vadc_result *result); + +/** + * qpnp_vadc_conv_seq_request() - Performs ADC read on the conversion + * sequencer channel. + * @dev: Structure device for qpnp vadc + * @channel: Input channel to perform the ADC read. + * @result: Structure pointer of type adc_chan_result + * in which the ADC read results are stored. + */ +int32_t qpnp_vadc_conv_seq_request(struct qpnp_vadc_chip *dev, + enum qpnp_vadc_trigger trigger_channel, + enum qpnp_vadc_channels channel, + struct qpnp_vadc_result *result); + +/** + * qpnp_adc_get_devicetree_data() - Abstracts the ADC devicetree data. + * @spmi: spmi ADC device. + * @adc_qpnp: spmi device tree node structure + */ +int32_t qpnp_adc_get_devicetree_data(struct spmi_device *spmi, + struct qpnp_adc_drv *adc_qpnp); + +/** + * qpnp_adc_scale_default() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the qpnp adc such as bit resolution, + * reference voltage. + * @chan_prop: Individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: Physical result to be stored. + */ +int32_t qpnp_adc_scale_default(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_pmic_therm() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Performs the AMUX out as 2mV/K and returns + * the temperature in milli degC. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the qpnp adc such as bit resolution, + * reference voltage. + * @chan_prop: Individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: Physical result to be stored. + */ +int32_t qpnp_adc_scale_pmic_therm(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_pmi_chg_temp() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. The voltage measured by HKADC is related to + * the junction temperature according to + * Tj = -137.67 degC * (V_adc * 2) + 382.04 degC + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the qpnp adc such as bit resolution, + * reference voltage. + * @chan_prop: Individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: Physical result to be stored. + */ +int32_t qpnp_adc_scale_pmi_chg_temp(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_batt_therm() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature in decidegC. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_batt_therm(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_qrd_batt_therm() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature in decidegC. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_qrd_batt_therm(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_qrd_skuaa_batt_therm() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature in decidegC. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_qrd_skuaa_batt_therm(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_qrd_skug_batt_therm() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature in decidegC. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_qrd_skug_batt_therm(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_qrd_skuh_batt_therm() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature in decidegC. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_qrd_skuh_batt_therm(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_qrd_skut1_batt_therm() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature in decidegC. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_qrd_skut1_batt_therm(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_smb_batt_therm() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature in decidegC. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_smb_batt_therm(struct qpnp_vadc_chip *dev, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_batt_id() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_batt_id(struct qpnp_vadc_chip *dev, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_tdkntcg_therm() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature of the xo therm in mili + degC. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_tdkntcg_therm(struct qpnp_vadc_chip *dev, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_therm_pu1() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature of the therm in degC. + * It uses a mapping table computed for a 150K pull-up. + * Pull-up1 is an internal pull-up on the AMUX of 150K. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_therm_pu1(struct qpnp_vadc_chip *dev, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_therm_pu2() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature of the therm in degC. + * It uses a mapping table computed for a 100K pull-up. + * Pull-up2 is an internal pull-up on the AMUX of 100K. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_therm_pu2(struct qpnp_vadc_chip *dev, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_adc_scale_therm_ncp03() - Scales the pre-calibrated digital output + * of an ADC to the ADC reference and compensates for the + * gain and offset. Returns the temperature of the therm in degC. + * It uses a mapping table computed for a NCP03WF683. + * @dev: Structure device for qpnp vadc + * @adc_code: pre-calibrated digital output of the ADC. + * @adc_prop: adc properties of the pm8xxx adc such as bit resolution, + * reference voltage. + * @chan_prop: individual channel properties to compensate the i/p scaling, + * slope and offset. + * @chan_rslt: physical result to be stored. + */ +int32_t qpnp_adc_scale_therm_ncp03(struct qpnp_vadc_chip *dev, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt); +/** + * qpnp_get_vadc() - Clients need to register with the vadc using the + * corresponding device instance it wants to read the channels + * from. Read the bindings document on how to pass the phandle + * for the corresponding vadc driver to register with. + * @dev: Clients device structure + * @name: Corresponding client's DT parser name. Read the DT bindings + * document on how to register with the vadc + * @struct qpnp_vadc_chip * - On success returns the vadc device structure + * pointer that needs to be used during an ADC request. + */ +struct qpnp_vadc_chip *qpnp_get_vadc(struct device *dev, const char *name); +/** + * qpnp_adc_tm_scaler() - Performs reverse calibration. + * @config: Thermal monitoring configuration. + * @adc_prop: adc properties of the qpnp adc such as bit resolution and + * reference voltage. + * @chan_prop: Individual channel properties to compensate the i/p scaling, + * slope and offset. + */ +static inline int32_t qpnp_adc_tm_scaler(struct qpnp_adc_tm_config *tm_config, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop) +{ return -ENXIO; } +/** + * qpnp_get_vadc_gain_and_offset() - Obtains the VADC gain and offset + * for absolute and ratiometric calibration. + * @dev: Structure device for qpnp vadc + * @param: The result in which the ADC offset and gain values are stored. + * @type: The calibration type whether client needs the absolute or + * ratiometric gain and offset values. + */ +int32_t qpnp_get_vadc_gain_and_offset(struct qpnp_vadc_chip *dev, + struct qpnp_vadc_linear_graph *param, + enum qpnp_adc_calib_type calib_type); +/** + * qpnp_adc_scale_millidegc_pmic_voltage_thr() - Performs reverse calibration + * on the low/high temperature threshold values passed by the + * client. The function coverts milldegC to voltage threshold + * and accounts for the corresponding channels scaling as (2mV/K). + * @dev: Structure device for qpnp vadc + * @param: The input parameters that contain the low/high temperature + * values. + * @low_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + * @high_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + */ +int32_t qpnp_adc_scale_millidegc_pmic_voltage_thr(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold); +/** + * qpnp_adc_btm_scaler() - Performs reverse calibration on the low/high + * temperature threshold values passed by the client. + * The function maps the temperature to voltage and applies + * ratiometric calibration on the voltage values. + * @dev: Structure device for qpnp vadc + * @param: The input parameters that contain the low/high temperature + * values. + * @low_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + * @high_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + */ +int32_t qpnp_adc_btm_scaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold); + +/** + * qpnp_adc_qrd_skuh_btm_scaler() - Performs reverse calibration on the low/high + * temperature threshold values passed by the client. + * The function maps the temperature to voltage and applies + * ratiometric calibration on the voltage values for SKUH board. + * @dev: Structure device for qpnp vadc + * @param: The input parameters that contain the low/high temperature + * values. + * @low_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + * @high_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + */ +int32_t qpnp_adc_qrd_skuh_btm_scaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold); +/** + * qpnp_adc_qrd_skut1_btm_scaler() - Performs reverse calibration on the low/high + * temperature threshold values passed by the client. + * The function maps the temperature to voltage and applies + * ratiometric calibration on the voltage values for SKUT1 board. + * @dev: Structure device for qpnp vadc + * @param: The input parameters that contain the low/high temperature + * values. + * @low_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + * @high_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + */ +int32_t qpnp_adc_qrd_skut1_btm_scaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold); +/** + * qpnp_adc_tm_scale_therm_voltage_pu2() - Performs reverse calibration + * and convert given temperature to voltage on supported + * thermistor channels using 100k pull-up. + * @dev: Structure device for qpnp vadc + * @param: The input temperature values. + */ +int32_t qpnp_adc_tm_scale_therm_voltage_pu2(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_config *param); +/** + * qpnp_adc_tm_scale_therm_voltage_pu2() - Performs reverse calibration + * and converts the given ADC code to temperature for + * thermistor channels using 100k pull-up. + * @dev: Structure device for qpnp vadc + * @reg: The input ADC code. + * @result: The physical measurement temperature on the thermistor. + */ +int32_t qpnp_adc_tm_scale_voltage_therm_pu2(struct qpnp_vadc_chip *dev, + uint32_t reg, int64_t *result); +/** + * qpnp_adc_usb_scaler() - Performs reverse calibration on the low/high + * voltage threshold values passed by the client. + * The function applies ratiometric calibration on the + * voltage values. + * @dev: Structure device for qpnp vadc + * @param: The input parameters that contain the low/high voltage + * threshold values. + * @low_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + * @high_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + */ +int32_t qpnp_adc_usb_scaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold); +/** + * qpnp_adc_vbatt_rscaler() - Performs reverse calibration on the low/high + * voltage threshold values passed by the client. + * The function applies ratiometric calibration on the + * voltage values. + * @dev: Structure device for qpnp vadc + * @param: The input parameters that contain the low/high voltage + * threshold values. + * @low_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + * @high_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + */ +int32_t qpnp_adc_vbatt_rscaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold); +/** + * qpnp_vadc_absolute_rthr() - Performs reverse calibration on the low/high + * voltage threshold values passed by the client. + * The function applies absolute calibration on the + * voltage values. + * @dev: Structure device for qpnp vadc + * @chan_prop: Individual channel properties to compensate the i/p scaling, + * slope and offset. + * @param: The input parameters that contain the low/high voltage + * threshold values. + * @low_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + * @high_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + */ +int32_t qpnp_vadc_absolute_rthr(struct qpnp_vadc_chip *dev, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold); +/** + * qpnp_adc_absolute_rthr() - Performs reverse calibration on the low/high + * voltage threshold values passed by the client. + * The function applies absolute calibration on the + * voltage values. + * @dev: Structure device for qpnp vadc + * @param: The input parameters that contain the low/high voltage + * threshold values. + * @low_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + * @high_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + */ +int32_t qpnp_adc_absolute_rthr(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold); +/** + * qpnp_adc_smb_btm_rscaler() - Performs reverse calibration on the low/high + * temperature threshold values passed by the client. + * The function maps the temperature to voltage and applies + * ratiometric calibration on the voltage values. + * @dev: Structure device for qpnp vadc + * @param: The input parameters that contain the low/high temperature + * values. + * @low_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + * @high_threshold: The low threshold value that needs to be updated with + * the above calibrated voltage value. + */ +int32_t qpnp_adc_smb_btm_rscaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold); +/** + * qpnp_vadc_iadc_sync_request() - Performs Voltage ADC read and + * locks the peripheral. When performing simultaneous + * voltage and current request the VADC peripheral is + * prepared for conversion and the IADC sync conversion + * is done from the IADC peripheral. + * @dev: Structure device for qpnp vadc + * @channel: Input channel to perform the voltage ADC read. + */ +int32_t qpnp_vadc_iadc_sync_request(struct qpnp_vadc_chip *dev, + enum qpnp_vadc_channels channel); +/** + * qpnp_vadc_iadc_sync_complete_request() - Reads the ADC result and + * unlocks the peripheral. + * @dev: Structure device for qpnp vadc + * @result: Structure pointer of type adc_chan_result + * in which the ADC read results are stored. + */ +int32_t qpnp_vadc_iadc_sync_complete_request(struct qpnp_vadc_chip *dev, + enum qpnp_vadc_channels channel, struct qpnp_vadc_result *result); +/** + * qpnp_vadc_sns_comp_result() - Compensate vbatt readings based on temperature + * @dev: Structure device for qpnp vadc + * @result: Voltage in uV that needs compensation. + * @is_pon_ocv: Whether the reading is from a power on OCV or not + */ +int32_t qpnp_vbat_sns_comp_result(struct qpnp_vadc_chip *dev, + int64_t *result, bool is_pon_ocv); +/** + * qpnp_adc_get_revid_version() - Obtain the PMIC number and revision. + * @dev: Structure device node. + * returns internal mapped PMIC number and revision id. + */ +int qpnp_adc_get_revid_version(struct device *dev); +/** + * qpnp_vadc_channel_monitor() - Configures kernel clients a channel to + * monitor the corresponding ADC channel for threshold detection. + * Driver passes the high/low voltage threshold along + * with the notification callback once the set thresholds + * are crossed. + * @param: Structure pointer of qpnp_adc_tm_btm_param type. + * Clients pass the low/high temperature along with the threshold + * notification callback. + */ +int32_t qpnp_vadc_channel_monitor(struct qpnp_vadc_chip *chip, + struct qpnp_adc_tm_btm_param *param); +/** + * qpnp_vadc_end_channel_monitor() - Disables recurring measurement mode for + * VADC_USR and disables the bank. + * @param: device instance for the VADC + */ +int32_t qpnp_vadc_end_channel_monitor(struct qpnp_vadc_chip *chip); +/** + * qpnp_vadc_calib_vref() - Read calibration channel REF_125V/VDD_VADC + * @dev: Structure device for qpnp vadc + * @calib_type: absolute or ratiometric calib type. + * returns calibration channel adc code. + */ +int32_t qpnp_vadc_calib_vref(struct qpnp_vadc_chip *vadc, + enum qpnp_adc_calib_type calib_type, + int *calib_data); +/** + * qpnp_vadc_calib_gnd() - Read calibration channel REF_625MV/GND_REF + * @dev: Structure device for qpnp vadc + * @calib_type: absolute or ratiometric calib type. + * returns calibration channel adc code. + */ +int32_t qpnp_vadc_calib_gnd(struct qpnp_vadc_chip *vadc, + enum qpnp_adc_calib_type calib_type, + int *calib_data); + +/** + * qpnp_adc_enable_voltage() - Enable LDO for HKADC + * @dev: Structure device for qpnp vadc + * returns result of enabling the regulator interface. + */ +int32_t qpnp_adc_enable_voltage(struct qpnp_adc_drv *adc); + +/** + * qpnp_adc_disable_voltage() - Disable vote for HKADC LDO + * @dev: Structure device for qpnp vadc + */ +void qpnp_adc_disable_voltage(struct qpnp_adc_drv *adc); + +/** + * qpnp_adc_free_voltage_resource() - Puts HKADC LDO + * @dev: Structure device for qpnp vadc + */ +void qpnp_adc_free_voltage_resource(struct qpnp_adc_drv *adc); + +#else +static inline int32_t qpnp_vadc_read(struct qpnp_vadc_chip *dev, + uint32_t channel, + struct qpnp_vadc_result *result) +{ return -ENXIO; } +static inline int32_t qpnp_vadc_hc_read(struct qpnp_vadc_chip *dev, + uint32_t channel, + struct qpnp_vadc_result *result) +{ return -ENXIO; } +static inline int32_t qpnp_vadc_conv_seq_request(struct qpnp_vadc_chip *dev, + enum qpnp_vadc_trigger trigger_channel, + enum qpnp_vadc_channels channel, + struct qpnp_vadc_result *result) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_default(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_pmic_therm(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_pmi_chg_temp(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_batt_therm(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_qrd_batt_therm( + struct qpnp_vadc_chip *vadc, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_qrd_skuaa_batt_therm( + struct qpnp_vadc_chip *vadc, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_qrd_skug_batt_therm( + struct qpnp_vadc_chip *vadc, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_qrd_skuh_batt_therm( + struct qpnp_vadc_chip *vdev, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_qrd_skut1_batt_therm( + struct qpnp_vadc_chip *vdev, int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_smb_batt_therm(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_batt_id(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_tdkntcg_therm(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_therm_pu1(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_therm_pu2(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_therm_ncp03(struct qpnp_vadc_chip *vadc, + int32_t adc_code, + const struct qpnp_adc_properties *adc_prop, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_vadc_result *chan_rslt) +{ return -ENXIO; } +static inline struct qpnp_vadc_chip *qpnp_get_vadc(struct device *dev, + const char *name) +{ return ERR_PTR(-ENXIO); } +static inline int32_t qpnp_get_vadc_gain_and_offset(struct qpnp_vadc_chip *dev, + struct qpnp_vadc_linear_graph *param, + enum qpnp_adc_calib_type calib_type) +{ return -ENXIO; } +static inline int32_t qpnp_adc_usb_scaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold) +{ return -ENXIO; } +static inline int32_t qpnp_adc_vbatt_rscaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold) +{ return -ENXIO; } +static inline int32_t qpnp_vadc_absolute_rthr(struct qpnp_vadc_chip *dev, + const struct qpnp_vadc_chan_properties *chan_prop, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold) +{ return -ENXIO; } +static inline int32_t qpnp_adc_absolute_rthr(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold) +{ return -ENXIO; } +static inline int32_t qpnp_adc_btm_scaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold) +{ return -ENXIO; } +static inline int32_t qpnp_adc_qrd_skuh_btm_scaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold) +{ return -ENXIO; } +static inline int32_t qpnp_adc_qrd_skut1_btm_scaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold) +{ return -ENXIO; } +static inline int32_t qpnp_adc_scale_millidegc_pmic_voltage_thr( + struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold) +{ return -ENXIO; } +static inline int32_t qpnp_adc_tm_scale_therm_voltage_pu2( + struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_config *param) +{ return -ENXIO; } +static inline int32_t qpnp_adc_tm_scale_voltage_therm_pu2( + struct qpnp_vadc_chip *dev, + uint32_t reg, int64_t *result) +{ return -ENXIO; } +static inline int32_t qpnp_adc_smb_btm_rscaler(struct qpnp_vadc_chip *dev, + struct qpnp_adc_tm_btm_param *param, + uint32_t *low_threshold, uint32_t *high_threshold) +{ return -ENXIO; } +static inline int32_t qpnp_vadc_iadc_sync_request(struct qpnp_vadc_chip *dev, + enum qpnp_vadc_channels channel) +{ return -ENXIO; } +static inline int32_t qpnp_vadc_iadc_sync_complete_request( + struct qpnp_vadc_chip *dev, + enum qpnp_vadc_channels channel, + struct qpnp_vadc_result *result) +{ return -ENXIO; } +static inline int32_t qpnp_vbat_sns_comp_result(struct qpnp_vadc_chip *dev, + int64_t *result) +{ return -ENXIO; } +static inline int qpnp_adc_get_revid_version(struct device *dev) +{ return -ENXIO; } +static inline int32_t qpnp_vadc_channel_monitor(struct qpnp_vadc_chip *chip, + struct qpnp_adc_tm_btm_param *param) +{ return -ENXIO; } +static inline int32_t qpnp_vadc_end_channel_monitor(struct qpnp_vadc_chip *chip) +{ return -ENXIO; } +static inline int32_t qpnp_vadc_calib_vref(struct qpnp_vadc_chip *vadc, + enum qpnp_adc_calib_type calib_type, + int *calib_data) +{ return -ENXIO; } +static inline int32_t qpnp_vadc_calib_gnd(struct qpnp_vadc_chip *vadc, + enum qpnp_adc_calib_type calib_type, + int *calib_data) +{ return -ENXIO; } + +static inline int32_t qpnp_adc_enable_voltage(struct qpnp_adc_drv *adc) +{ return -ENXIO; } + +static inline void qpnp_adc_disable_voltage(struct qpnp_adc_drv *adc) +{ return; } + +static inline void qpnp_adc_free_voltage_resource(struct qpnp_adc_drv *adc) +{ return; } + +#endif + +/* Public API */ +#if defined(CONFIG_SENSORS_QPNP_ADC_CURRENT) \ + || defined(CONFIG_SENSORS_QPNP_ADC_CURRENT_MODULE) +/** + * qpnp_iadc_read() - Performs ADC read on the current channel. + * @dev: Structure device for qpnp iadc + * @channel: Input channel to perform the ADC read. + * @result: Current across rsense in mA. + * @return: 0 on success. + */ +int32_t qpnp_iadc_read(struct qpnp_iadc_chip *dev, + enum qpnp_iadc_channels channel, + struct qpnp_iadc_result *result); +/** + * qpnp_iadc_get_rsense() - Reads the RDS resistance value from the + trim registers. + * @dev: Structure device for qpnp iadc + * @rsense: RDS resistance in nOhms. + * @return: 0 on success. + */ +int32_t qpnp_iadc_get_rsense(struct qpnp_iadc_chip *dev, int32_t *rsense); +/** + * qpnp_iadc_get_gain_and_offset() - Performs gain calibration + * over 17.8571mV and offset over selected + * channel. Channel can be internal rsense, + * external rsense and alternate lead pair. + * @dev: Structure device for qpnp iadc + * @result: result structure where the gain and offset is stored of + * type qpnp_iadc_calib. + * @return: 0 on success. + */ +int32_t qpnp_iadc_get_gain_and_offset(struct qpnp_iadc_chip *dev, + struct qpnp_iadc_calib *result); +/** + * qpnp_get_iadc() - Clients need to register with the iadc with the + * corresponding device instance it wants to read the channels. + * Read the bindings document on how to pass the phandle for + * the corresponding vadc driver to register with. + * @dev: Clients device structure + * @name: Corresponding client's DT parser name. Read the DT bindings + * document on how to register with the iadc + * @struct qpnp_iadc_chip * - On success returns the iadc device structure + * pointer used everytime client makes an ADC request. + */ +struct qpnp_iadc_chip *qpnp_get_iadc(struct device *dev, const char *name); +/** + * qpnp_iadc_vadc_sync_read() - Performs synchronous VADC and IADC read. + * The api is to be used only by the BMS to perform + * simultaneous VADC and IADC measurement for battery voltage + * and current. + * @dev: Structure device for qpnp iadc + * @i_channel: Input battery current channel to perform the IADC read. + * @i_result: Current across the rsense in mA. + * @v_channel: Input battery voltage channel to perform VADC read. + * @v_result: Voltage on the vbatt channel with units in mV. + * @return: 0 on success. + */ +int32_t qpnp_iadc_vadc_sync_read(struct qpnp_iadc_chip *dev, + enum qpnp_iadc_channels i_channel, struct qpnp_iadc_result *i_result, + enum qpnp_vadc_channels v_channel, struct qpnp_vadc_result *v_result); +/** + * qpnp_iadc_calibrate_for_trim - Clients can use this API to re-calibrate + * IADC. The offset and gain values are programmed in the trim + * registers. The offset and the gain can be retrieved using + * qpnp_iadc_get_gain_and_offset + * @dev: Structure device for qpnp iadc + * @batfet_closed: batfet is opened or closed. The IADC chooses proper + * channel (internal/external) based on batfet status + * for calibration. + * RETURNS: 0 on success. + */ +int32_t qpnp_iadc_calibrate_for_trim(struct qpnp_iadc_chip *dev, + bool batfet_closed); +/** + * qpnp_iadc_comp_result() - Compensates the result of the current based on + * the gain and offset co-effients and rsense parameters. + * @dev: Structure device for qpnp iadc + * @result: Current value to perform the compensation. + * @return: 0 on success. + */ +int32_t qpnp_iadc_comp_result(struct qpnp_iadc_chip *dev, int64_t *result); +/** + * qpnp_iadc_skip_calibration() - Clients can use this API to ask the driver + * to skip iadc calibrations + * @dev: Structure device for qpnp iadc + * @result: 0 on success and -EPROBE_DEFER when probe for the device + * has not occured. + */ +int qpnp_iadc_skip_calibration(struct qpnp_iadc_chip *dev); +/** + * qpnp_iadc_resume_calibration() - Clients can use this API to ask the driver + * to resume iadc calibrations + * @dev: Structure device for qpnp iadc + * @result: 0 on success and -EPROBE_DEFER when probe for the device + * has not occured. + */ +int qpnp_iadc_resume_calibration(struct qpnp_iadc_chip *dev); +#else +static inline int32_t qpnp_iadc_read(struct qpnp_iadc_chip *iadc, + enum qpnp_iadc_channels channel, struct qpnp_iadc_result *result) +{ return -ENXIO; } +static inline int32_t qpnp_iadc_get_rsense(struct qpnp_iadc_chip *iadc, + int32_t *rsense) +{ return -ENXIO; } +static inline int32_t qpnp_iadc_get_gain_and_offset(struct qpnp_iadc_chip *iadc, + struct qpnp_iadc_calib *result) +{ return -ENXIO; } +static inline struct qpnp_iadc_chip *qpnp_get_iadc(struct device *dev, + const char *name) +{ return ERR_PTR(-ENXIO); } +static inline int32_t qpnp_iadc_vadc_sync_read(struct qpnp_iadc_chip *iadc, + enum qpnp_iadc_channels i_channel, struct qpnp_iadc_result *i_result, + enum qpnp_vadc_channels v_channel, struct qpnp_vadc_result *v_result) +{ return -ENXIO; } +static inline int32_t qpnp_iadc_calibrate_for_trim(struct qpnp_iadc_chip *iadc, + bool batfet_closed) +{ return -ENXIO; } +static inline int32_t qpnp_iadc_comp_result(struct qpnp_iadc_chip *iadc, + int64_t *result) +{ return -ENXIO; } +static inline int qpnp_iadc_skip_calibration(struct qpnp_iadc_chip *iadc) +{ return -ENXIO; } +static inline int qpnp_iadc_resume_calibration(struct qpnp_iadc_chip *iadc) +{ return -ENXIO; } +#endif + +/* Public API */ +#if defined(CONFIG_THERMAL_QPNP_ADC_TM) \ + || defined(CONFIG_THERMAL_QPNP_ADC_TM_MODULE) +/** + * qpnp_adc_tm_usbid_configure() - Configures Channel 0 of VADC_BTM to + * monitor USB_ID channel using 100k internal pull-up. + * USB driver passes the high/low voltage threshold along + * with the notification callback once the set thresholds + * are crossed. + * @param: Structure pointer of qpnp_adc_tm_usbid_param type. + * Clients pass the low/high voltage along with the threshold + * notification callback. + */ +int32_t qpnp_adc_tm_usbid_configure(struct qpnp_adc_tm_chip *chip, + struct qpnp_adc_tm_btm_param *param); +/** + * qpnp_adc_tm_usbid_end() - Disables the monitoring of channel 0 thats + * assigned for monitoring USB_ID. Disables the low/high + * threshold activation for channel 0 as well. + * @param: none. + */ +int32_t qpnp_adc_tm_usbid_end(struct qpnp_adc_tm_chip *chip); +/** + * qpnp_adc_tm_channel_measure() - Configures kernel clients a channel to + * monitor the corresponding ADC channel for threshold detection. + * Driver passes the high/low voltage threshold along + * with the notification callback once the set thresholds + * are crossed. + * @param: Structure pointer of qpnp_adc_tm_btm_param type. + * Clients pass the low/high temperature along with the threshold + * notification callback. + */ +int32_t qpnp_adc_tm_channel_measure(struct qpnp_adc_tm_chip *chip, + struct qpnp_adc_tm_btm_param *param); +/** + * qpnp_adc_tm_disable_chan_meas() - Disables the monitoring of channel thats + * assigned for monitoring kernel clients. Disables the low/high + * threshold activation for the corresponding channel. + * @param: Structure pointer of qpnp_adc_tm_btm_param type. + * This is used to identify the channel for which the corresponding + * channels high/low threshold notification will be disabled. + */ +int32_t qpnp_adc_tm_disable_chan_meas(struct qpnp_adc_tm_chip *chip, + struct qpnp_adc_tm_btm_param *param); +/** + * qpnp_get_adc_tm() - Clients need to register with the adc_tm using the + * corresponding device instance it wants to read the channels + * from. Read the bindings document on how to pass the phandle + * for the corresponding adc_tm driver to register with. + * @name: Corresponding client's DT parser name. Read the DT bindings + * document on how to register with the vadc + * @struct qpnp_adc_tm_chip * - On success returns the vadc device structure + * pointer that needs to be used during an ADC TM request. + */ +struct qpnp_adc_tm_chip *qpnp_get_adc_tm(struct device *dev, const char *name); +#else +static inline int32_t qpnp_adc_tm_usbid_configure( + struct qpnp_adc_tm_chip *chip, + struct qpnp_adc_tm_btm_param *param) +{ return -ENXIO; } +static inline int32_t qpnp_adc_tm_usbid_end(struct qpnp_adc_tm_chip *chip) +{ return -ENXIO; } +static inline int32_t qpnp_adc_tm_channel_measure( + struct qpnp_adc_tm_chip *chip, + struct qpnp_adc_tm_btm_param *param) +{ return -ENXIO; } +static inline int32_t qpnp_adc_tm_disable_chan_meas( + struct qpnp_adc_tm_chip *chip, + struct qpnp_adc_tm_btm_param *param) +{ return -ENXIO; } +static inline struct qpnp_adc_tm_chip *qpnp_get_adc_tm(struct device *dev, + const char *name) +{ return ERR_PTR(-ENXIO); } +#endif + +#endif diff --git a/include/linux/qpnp/qpnp-haptic.h b/include/linux/qpnp/qpnp-haptic.h new file mode 100644 index 000000000000..92a66e844f94 --- /dev/null +++ b/include/linux/qpnp/qpnp-haptic.h @@ -0,0 +1,23 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __QPNP_HAPTIC_H + +/* interface for the other module to play different sequences */ +#ifdef CONFIG_QPNP_HAPTIC +int qpnp_hap_play_byte(u8 data, bool on); +#else +int qpnp_hap_play_byte(u8 data, bool on); +{ + return 0; +} +#endif +#endif diff --git a/include/linux/qpnp/qpnp-revid.h b/include/linux/qpnp/qpnp-revid.h new file mode 100644 index 000000000000..d67efaf678e4 --- /dev/null +++ b/include/linux/qpnp/qpnp-revid.h @@ -0,0 +1,176 @@ +/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __QPNP_REVID +#define __QPNP_REVID + +#define PM8226_V2P2_REV1 0x00 +#define PM8226_V2P2_REV2 0x00 +#define PM8226_V2P2_REV3 0x02 +#define PM8226_V2P2_REV4 0x02 +#define PM8226_V2P2_TYPE 0x51 +#define PM8226_V2P2_SUBTYPE 0x04 + +#define PM8226_V2P1_REV1 0x00 +#define PM8226_V2P1_REV2 0x00 +#define PM8226_V2P1_REV3 0x01 +#define PM8226_V2P1_REV4 0x02 +#define PM8226_V2P1_TYPE 0x51 +#define PM8226_V2P1_SUBTYPE 0x04 + +#define PM8226_V2P0_REV1 0x00 +#define PM8226_V2P0_REV2 0x00 +#define PM8226_V2P0_REV3 0x00 +#define PM8226_V2P0_REV4 0x02 +#define PM8226_V2P0_TYPE 0x51 +#define PM8226_V2P0_SUBTYPE 0x04 + +#define PM8226_V1P0_REV1 0x00 +#define PM8226_V1P0_REV2 0x00 +#define PM8226_V1P0_REV3 0x00 +#define PM8226_V1P0_REV4 0x00 +#define PM8226_V1P0_TYPE 0x51 +#define PM8226_V1P0_SUBTYPE 0x04 + +#define PM8941_V1P0_REV1 0x00 +#define PM8941_V1P0_REV2 0x00 +#define PM8941_V1P0_REV3 0x00 +#define PM8941_V1P0_REV4 0x01 +#define PM8941_V1P0_TYPE 0x51 +#define PM8941_V1P0_SUBTYPE 0x01 + +#define PM8941_V2P0_REV1 0x00 +#define PM8941_V2P0_REV2 0x00 +#define PM8941_V2P0_REV3 0x00 +#define PM8941_V2P0_REV4 0x01 +#define PM8941_V2P0_TYPE 0x51 +#define PM8941_V2P0_SUBTYPE 0x01 + +#define PM8941_V3P0_REV1 0x00 +#define PM8941_V3P0_REV2 0x00 +#define PM8941_V3P0_REV3 0x00 +#define PM8941_V3P0_REV4 0x03 +#define PM8941_V3P0_TYPE 0x51 +#define PM8941_V3P0_SUBTYPE 0x01 + +#define PM8941_V3P1_REV1 0x00 +#define PM8941_V3P1_REV2 0x00 +#define PM8941_V3P1_REV3 0x01 +#define PM8941_V3P1_REV4 0x03 +#define PM8941_V3P1_TYPE 0x51 +#define PM8941_V3P1_SUBTYPE 0x01 + +#define PM8110_V1P0_REV1 0x00 +#define PM8110_V1P0_REV2 0x00 +#define PM8110_V1P0_REV3 0x00 +#define PM8110_V1P0_REV4 0x01 +#define PM8110_V1P0_TYPE 0x51 +#define PM8110_V1P0_SUBTYPE 0x05 + +#define PM8110_V1P1_REV1 0x00 +#define PM8110_V1P1_REV2 0x01 +#define PM8110_V1P1_REV3 0x00 +#define PM8110_V1P1_REV4 0x01 +#define PM8110_V1P1_TYPE 0x51 +#define PM8110_V1P1_SUBTYPE 0x05 + +#define PM8110_V1P3_REV1 0x00 +#define PM8110_V1P3_REV2 0x03 +#define PM8110_V1P3_REV3 0x00 +#define PM8110_V1P3_REV4 0x01 +#define PM8110_V1P3_TYPE 0x51 +#define PM8110_V1P3_SUBTYPE 0x05 + +#define PM8110_V2P0_REV1 0x00 +#define PM8110_V2P0_REV2 0x00 +#define PM8110_V2P0_REV3 0x00 +#define PM8110_V2P0_REV4 0x02 +#define PM8110_V2P0_TYPE 0x51 +#define PM8110_V2P0_SUBTYPE 0x05 + +#define PM8916_V1P0_REV1 0x00 +#define PM8916_V1P0_REV2 0x00 +#define PM8916_V1P0_REV3 0x00 +#define PM8916_V1P0_REV4 0x01 +#define PM8916_V1P0_TYPE 0x51 +#define PM8916_V1P0_SUBTYPE 0x0B + +#define PM8916_V1P1_REV1 0x00 +#define PM8916_V1P1_REV2 0x00 +#define PM8916_V1P1_REV3 0x01 +#define PM8916_V1P1_REV4 0x01 +#define PM8916_V1P1_TYPE 0x51 +#define PM8916_V1P1_SUBTYPE 0x0B + +#define PM8916_V2P0_REV1 0x00 +#define PM8916_V2P0_REV2 0x00 +#define PM8916_V2P0_REV3 0x00 +#define PM8916_V2P0_REV4 0x02 +#define PM8916_V2P0_TYPE 0x51 +#define PM8916_V2P0_SUBTYPE 0x0B + +#define PM8909_V1P0_REV1 0x00 +#define PM8909_V1P0_REV2 0x00 +#define PM8909_V1P0_REV3 0x00 +#define PM8909_V1P0_REV4 0x01 +#define PM8909_V1P0_TYPE 0x51 +#define PM8909_V1P0_SUBTYPE 0x0D + +#define PM8909_V1P1_REV1 0x00 +#define PM8909_V1P1_REV2 0x00 +#define PM8909_V1P1_REV3 0x01 +#define PM8909_V1P1_REV4 0x01 +#define PM8909_V1P1_TYPE 0x51 +#define PM8909_V1P1_SUBTYPE 0x0D + +#define PMI8994_V1P0_REV1 0x00 +#define PMI8994_V1P0_REV2 0x00 +#define PMI8994_V1P0_REV3 0x00 +#define PMI8994_V1P0_REV4 0x01 +#define PMI8994_V1P0_TYPE 0x51 +#define PMI8994_V1P0_SUBTYPE 0x0A + +#define PMI8994_V2P0_REV1 0x00 +#define PMI8994_V2P0_REV2 0x00 +#define PMI8994_V2P0_REV3 0x00 +#define PMI8994_V2P0_REV4 0x02 +#define PMI8994_V2P0_TYPE 0x51 +#define PMI8994_V2P0_SUBTYPE 0x0A + +#define PM8950_V1P0_REV4 0x01 +#define PM8950_V1P0_TYPE 0x51 +#define PM8950_V1P0_SUBTYPE 0x10 + +#define PM8950_V2P0_REV4 0x02 +#define PM8950_V2P0_TYPE 0x51 +#define PM8950_V2P0_SUBTYPE 0x10 + +struct pmic_revid_data { + u8 rev1; + u8 rev2; + u8 rev3; + u8 rev4; + u8 pmic_type; + u8 pmic_subtype; + const char *pmic_name; +}; + +#ifdef CONFIG_QPNP_REVID +struct pmic_revid_data *get_revid_data(struct device_node *dev_node); +#else +static inline +struct pmic_revid_data *get_revid_data(struct device_node *dev_node) +{ + return NULL; +} +#endif +#endif diff --git a/include/linux/regulator/kryo-regulator.h b/include/linux/regulator/kryo-regulator.h new file mode 100644 index 000000000000..ab51f8629d2d --- /dev/null +++ b/include/linux/regulator/kryo-regulator.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __KRYO_REGULATOR_H__ +#define __KRYO_REGULATOR_H__ + +/** + * enum kryo_supply_mode - supported operating modes by this regulator type. + * Use negative logic to ensure BHS mode is treated as the safe default by the + * the regulator framework. This is necessary since LDO mode can only be enabled + * when several constraints are satisfied. Consumers of this regulator are + * expected to request changes in operating modes through the use of + * regulator_allow_bypass() passing in the desired Kryo supply mode. + * %BHS_MODE: to select BHS as operating mode + * %LDO_MODE: to select LDO as operating mode + */ +enum kryo_supply_mode { + BHS_MODE = false, + LDO_MODE = true, +}; + +#endif /* __KRYO_REGULATOR_H__ */ diff --git a/include/linux/regulator/proxy-consumer.h b/include/linux/regulator/proxy-consumer.h new file mode 100644 index 000000000000..10ba5411a983 --- /dev/null +++ b/include/linux/regulator/proxy-consumer.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2013, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _LINUX_REGULATOR_PROXY_CONSUMER_H_ +#define _LINUX_REGULATOR_PROXY_CONSUMER_H_ + +#include <linux/device.h> +#include <linux/of.h> + +struct proxy_consumer; + +#ifdef CONFIG_REGULATOR_PROXY_CONSUMER + +struct proxy_consumer *regulator_proxy_consumer_register(struct device *reg_dev, + struct device_node *reg_node); + +int regulator_proxy_consumer_unregister(struct proxy_consumer *consumer); + +#else + +static inline struct proxy_consumer *regulator_proxy_consumer_register( + struct device *reg_dev, struct device_node *reg_node) +{ return NULL; } + +static inline int regulator_proxy_consumer_unregister( + struct proxy_consumer *consumer) +{ return 0; } + +#endif + +#endif diff --git a/include/linux/regulator/qpnp-regulator.h b/include/linux/regulator/qpnp-regulator.h new file mode 100644 index 000000000000..c7afeb50f244 --- /dev/null +++ b/include/linux/regulator/qpnp-regulator.h @@ -0,0 +1,197 @@ +/* + * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __REGULATOR_QPNP_REGULATOR_H__ +#define __REGULATOR_QPNP_REGULATOR_H__ + +#include <linux/regulator/machine.h> + +#define QPNP_REGULATOR_DRIVER_NAME "qcom,qpnp-regulator" + +/* Pin control enable input pins. */ +#define QPNP_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00 +#define QPNP_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01 +#define QPNP_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02 +#define QPNP_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04 +#define QPNP_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08 +#define QPNP_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10 + +/* Pin control high power mode input pins. */ +#define QPNP_REGULATOR_PIN_CTRL_HPM_NONE 0x00 +#define QPNP_REGULATOR_PIN_CTRL_HPM_EN0 0x01 +#define QPNP_REGULATOR_PIN_CTRL_HPM_EN1 0x02 +#define QPNP_REGULATOR_PIN_CTRL_HPM_EN2 0x04 +#define QPNP_REGULATOR_PIN_CTRL_HPM_EN3 0x08 +#define QPNP_REGULATOR_PIN_CTRL_HPM_SLEEP_B 0x10 +#define QPNP_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT 0x20 + +/* + * Used with enable parameters to specify that hardware default register values + * should be left unaltered. + */ +#define QPNP_REGULATOR_DISABLE 0 +#define QPNP_REGULATOR_ENABLE 1 +#define QPNP_REGULATOR_USE_HW_DEFAULT 2 + +/* Soft start strength of a voltage switch type regulator */ +enum qpnp_vs_soft_start_str { + QPNP_VS_SOFT_START_STR_0P05_UA, + QPNP_VS_SOFT_START_STR_0P25_UA, + QPNP_VS_SOFT_START_STR_0P55_UA, + QPNP_VS_SOFT_START_STR_0P75_UA, + QPNP_VS_SOFT_START_STR_HW_DEFAULT, +}; + +/* Current limit of a boost type regulator */ +enum qpnp_boost_current_limit { + QPNP_BOOST_CURRENT_LIMIT_300_MA, + QPNP_BOOST_CURRENT_LIMIT_600_MA, + QPNP_BOOST_CURRENT_LIMIT_900_MA, + QPNP_BOOST_CURRENT_LIMIT_1200_MA, + QPNP_BOOST_CURRENT_LIMIT_1500_MA, + QPNP_BOOST_CURRENT_LIMIT_1800_MA, + QPNP_BOOST_CURRENT_LIMIT_2100_MA, + QPNP_BOOST_CURRENT_LIMIT_2400_MA, + QPNP_BOOST_CURRENT_LIMIT_HW_DEFAULT, +}; + +/** + * struct qpnp_regulator_platform_data - qpnp-regulator initialization data + * @init_data: regulator constraints + * @pull_down_enable: 1 = Enable output pull down resistor when the + * regulator is disabled + * 0 = Disable pull down resistor + * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify + * pull down state + * @pin_ctrl_enable: Bit mask specifying which hardware pins should be + * used to enable the regulator, if any + * Value should be an ORing of + * QPNP_REGULATOR_PIN_CTRL_ENABLE_* constants. If + * the bit specified by + * QPNP_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is + * set, then pin control enable hardware registers + * will not be modified. + * @pin_ctrl_hpm: Bit mask specifying which hardware pins should be + * used to force the regulator into high power + * mode, if any + * Value should be an ORing of + * QPNP_REGULATOR_PIN_CTRL_HPM_* constants. If + * the bit specified by + * QPNP_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is + * set, then pin control mode hardware registers + * will not be modified. + * @system_load: Load in uA present on regulator that is not captured + * by any consumer request + * @enable_time: Time in us to delay after enabling the regulator + * @ocp_enable: 1 = Allow over current protection (OCP) to be + * enabled for voltage switch type regulators so + * that they latch off automatically when over + * current is detected. OCP is enabled when in HPM + * or auto mode. + * 0 = Disable OCP + * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify + * OCP state + * @ocp_irq: IRQ number of the voltage switch OCP IRQ. If + * specified the voltage switch will be toggled off + * and back on when OCP triggers in order to handle + * high in-rush current. + * @ocp_max_retries: Maximum number of times to try toggling a voltage + * switch off and back on as a result of + * consecutive over current events. + * @ocp_retry_delay_ms: Time to delay in milliseconds between each + * voltage switch toggle after an over current + * event takes place. + * @boost_current_limit: This parameter sets the current limit of boost type + * regulators. Its value should be one of + * QPNP_BOOST_CURRENT_LIMIT_*. If its value is + * QPNP_BOOST_CURRENT_LIMIT_HW_DEFAULT, then the + * boost current limit will be left at its default + * hardware value. + * @soft_start_enable: 1 = Enable soft start for LDO and voltage switch + * type regulators so that output voltage slowly + * ramps up when the regulator is enabled + * 0 = Disable soft start + * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify + * soft start state + * @vs_soft_start_strength: This parameter sets the soft start strength for + * voltage switch type regulators. Its value + * should be one of QPNP_VS_SOFT_START_STR_*. If + * its value is QPNP_VS_SOFT_START_STR_HW_DEFAULT, + * then the soft start strength will be left at its + * default hardware value. + * @auto_mode_enable: 1 = Enable automatic hardware selection of regulator + * mode (HPM vs LPM). Auto mode is not available + * on boost type regulators + * 0 = Disable auto mode selection + * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify + * auto mode state + * @bypass_mode_enable: 1 = Enable bypass mode for an LDO type regulator so + * that it acts like a switch and simply outputs + * its input voltage + * 0 = Do not enable bypass mode + * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify + * bypass mode state + * @hpm_enable: 1 = Enable high power mode (HPM), also referred to + * as NPM. HPM consumes more ground current than + * LPM, but it can source significantly higher load + * current. HPM is not available on boost type + * regulators. For voltage switch type regulators, + * HPM implies that over current protection and + * soft start are active all the time. This + * configuration can be overwritten by changing the + * regulator's mode dynamically. + * 0 = Do not enable HPM + * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify + * HPM state + * @base_addr: SMPI base address for the regulator peripheral + */ +struct qpnp_regulator_platform_data { + struct regulator_init_data init_data; + int pull_down_enable; + unsigned pin_ctrl_enable; + unsigned pin_ctrl_hpm; + int system_load; + int enable_time; + int ocp_enable; + int ocp_irq; + int ocp_max_retries; + int ocp_retry_delay_ms; + enum qpnp_boost_current_limit boost_current_limit; + int soft_start_enable; + enum qpnp_vs_soft_start_str vs_soft_start_strength; + int auto_mode_enable; + int bypass_mode_enable; + int hpm_enable; + u16 base_addr; +}; + +#ifdef CONFIG_REGULATOR_QPNP + +/** + * qpnp_regulator_init() - register spmi driver for qpnp-regulator + * + * This initialization function should be called in systems in which driver + * registration ordering must be controlled precisely. + */ +int __init qpnp_regulator_init(void); + +#else + +static inline int __init qpnp_regulator_init(void) +{ + return -ENODEV; +} + +#endif /* CONFIG_REGULATOR_QPNP */ + +#endif diff --git a/include/linux/regulator/rpm-smd-regulator.h b/include/linux/regulator/rpm-smd-regulator.h new file mode 100644 index 000000000000..c57995d3f5a2 --- /dev/null +++ b/include/linux/regulator/rpm-smd-regulator.h @@ -0,0 +1,132 @@ +/* Copyright (c) 2012-2013, 2015 The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _LINUX_REGULATOR_RPM_SMD_H +#define _LINUX_REGULATOR_RPM_SMD_H + +#include <linux/device.h> + +struct rpm_regulator; + +/** + * enum rpm_regulator_voltage_corner - possible voltage corner values + * + * These should be used in regulator_set_voltage() and + * rpm_regulator_set_voltage() calls for corner type regulators as if they had + * units of uV. + * + * Note, the meaning of corner values is set by the RPM. It is possible that + * future platforms will utilize different corner values. The values specified + * in this enum correspond to MSM8974 for PMIC PM8841 SMPS 2 (VDD_Dig). + */ +enum rpm_regulator_voltage_corner { + RPM_REGULATOR_CORNER_NONE = 1, + RPM_REGULATOR_CORNER_RETENTION, + RPM_REGULATOR_CORNER_SVS_KRAIT, + RPM_REGULATOR_CORNER_SVS_SOC, + RPM_REGULATOR_CORNER_NORMAL, + RPM_REGULATOR_CORNER_TURBO, + RPM_REGULATOR_CORNER_SUPER_TURBO, +}; + +/** + * enum rpm_regulator_voltage_level - possible voltage level values + * + * These should be used in regulator_set_voltage() and + * rpm_regulator_set_voltage() calls for level type regulators as if they had + * units of uV. + * + * Note: the meaning of level values is set by the RPM. + */ +enum rpm_regulator_voltage_level { + RPM_REGULATOR_LEVEL_NONE = 0, + RPM_REGULATOR_LEVEL_RETENTION = 16, + RPM_REGULATOR_LEVEL_RETENTION_PLUS = 32, + RPM_REGULATOR_LEVEL_MIN_SVS = 48, + RPM_REGULATOR_LEVEL_LOW_SVS = 64, + RPM_REGULATOR_LEVEL_SVS = 128, + RPM_REGULATOR_LEVEL_SVS_PLUS = 192, + RPM_REGULATOR_LEVEL_NOM = 256, + RPM_REGULATOR_LEVEL_NOM_PLUS = 320, + RPM_REGULATOR_LEVEL_TURBO = 384, + RPM_REGULATOR_LEVEL_BINNING = 512, + RPM_REGULATOR_LEVEL_MAX = 65535, +}; + +/** + * enum rpm_regulator_mode - control mode for LDO or SMPS type regulators + * %RPM_REGULATOR_MODE_AUTO: For SMPS type regulators, use SMPS auto mode so + * that the hardware can automatically switch + * between PFM and PWM modes based on realtime + * load. + * LDO type regulators do not support this mode. + * %RPM_REGULATOR_MODE_IPEAK: For SMPS type regulators, use aggregated + * software current requests to determine + * usage of PFM or PWM mode. + * For LDO type regulators, use aggregated + * software current requests to determine + * usage of LPM or HPM mode. + * %RPM_REGULATOR_MODE_HPM: For SMPS type regulators, force the + * usage of PWM mode. + * For LDO type regulators, force the + * usage of HPM mode. + * + * These values should be used in calls to rpm_regulator_set_mode(). + */ +enum rpm_regulator_mode { + RPM_REGULATOR_MODE_AUTO, + RPM_REGULATOR_MODE_IPEAK, + RPM_REGULATOR_MODE_HPM, +}; + +#ifdef CONFIG_REGULATOR_RPM_SMD + +struct rpm_regulator *rpm_regulator_get(struct device *dev, const char *supply); + +void rpm_regulator_put(struct rpm_regulator *regulator); + +int rpm_regulator_enable(struct rpm_regulator *regulator); + +int rpm_regulator_disable(struct rpm_regulator *regulator); + +int rpm_regulator_set_voltage(struct rpm_regulator *regulator, int min_uV, + int max_uV); + +int rpm_regulator_set_mode(struct rpm_regulator *regulator, + enum rpm_regulator_mode mode); + +int __init rpm_smd_regulator_driver_init(void); + +#else + +static inline struct rpm_regulator *rpm_regulator_get(struct device *dev, + const char *supply) { return NULL; } + +static inline void rpm_regulator_put(struct rpm_regulator *regulator) { } + +static inline int rpm_regulator_enable(struct rpm_regulator *regulator) + { return 0; } + +static inline int rpm_regulator_disable(struct rpm_regulator *regulator) + { return 0; } + +static inline int rpm_regulator_set_voltage(struct rpm_regulator *regulator, + int min_uV, int max_uV) { return 0; } + +static inline int rpm_regulator_set_mode(struct rpm_regulator *regulator, + enum rpm_regulator_mode mode) { return 0; } + +static inline int __init rpm_smd_regulator_driver_init(void) { return 0; } + +#endif /* CONFIG_REGULATOR_RPM_SMD */ + +#endif diff --git a/include/linux/regulator/spm-regulator.h b/include/linux/regulator/spm-regulator.h new file mode 100644 index 000000000000..bd5da2e3352b --- /dev/null +++ b/include/linux/regulator/spm-regulator.h @@ -0,0 +1,25 @@ +/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _LINUX_REGULATOR_SPM_H +#define _LINUX_REGULATOR_SPM_H + +#include <linux/err.h> +#include <linux/init.h> + +#ifdef CONFIG_REGULATOR_SPM +int __init spm_regulator_init(void); +#else +static inline int __init spm_regulator_init(void) { return -ENODEV; } +#endif + +#endif diff --git a/include/soc/qcom/spm.h b/include/soc/qcom/spm.h new file mode 100644 index 000000000000..3900864dc8d1 --- /dev/null +++ b/include/soc/qcom/spm.h @@ -0,0 +1,148 @@ +/* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARCH_ARM_MACH_MSM_SPM_H +#define __ARCH_ARM_MACH_MSM_SPM_H + +enum { + MSM_SPM_MODE_DISABLED, + MSM_SPM_MODE_CLOCK_GATING, + MSM_SPM_MODE_RETENTION, + MSM_SPM_MODE_GDHS, + MSM_SPM_MODE_POWER_COLLAPSE, + MSM_SPM_MODE_STANDALONE_POWER_COLLAPSE, + MSM_SPM_MODE_FASTPC, + MSM_SPM_MODE_NR +}; + +enum msm_spm_avs_irq { + MSM_SPM_AVS_IRQ_MIN, + MSM_SPM_AVS_IRQ_MAX, +}; + +struct msm_spm_device; +struct device_node; + +#if defined(CONFIG_MSM_SPM) + +int msm_spm_set_low_power_mode(unsigned int mode, bool notify_rpm); +int msm_spm_probe_done(void); +int msm_spm_set_vdd(unsigned int cpu, unsigned int vlevel); +int msm_spm_get_vdd(unsigned int cpu); +int msm_spm_turn_on_cpu_rail(struct device_node *l2ccc_node, + unsigned int val, int cpu, int vctl_offset); +struct msm_spm_device *msm_spm_get_device_by_name(const char *name); +int msm_spm_config_low_power_mode(struct msm_spm_device *dev, + unsigned int mode, bool notify_rpm); +int msm_spm_device_init(void); +bool msm_spm_is_mode_avail(unsigned int mode); +void msm_spm_dump_regs(unsigned int cpu); +int msm_spm_is_avs_enabled(unsigned int cpu); +int msm_spm_avs_enable(unsigned int cpu); +int msm_spm_avs_disable(unsigned int cpu); +int msm_spm_avs_set_limit(unsigned int cpu, uint32_t min_lvl, + uint32_t max_lvl); +int msm_spm_avs_enable_irq(unsigned int cpu, enum msm_spm_avs_irq irq); +int msm_spm_avs_disable_irq(unsigned int cpu, enum msm_spm_avs_irq irq); +int msm_spm_avs_clear_irq(unsigned int cpu, enum msm_spm_avs_irq irq); + +#if defined(CONFIG_MSM_L2_SPM) + +/* Public functions */ + +int msm_spm_apcs_set_phase(int cpu, unsigned int phase_cnt); +int msm_spm_enable_fts_lpm(int cpu, uint32_t mode); + +#else + +static inline int msm_spm_apcs_set_phase(int cpu, unsigned int phase_cnt) +{ + return -ENOSYS; +} + +static inline int msm_spm_enable_fts_lpm(int cpu, uint32_t mode) +{ + return -ENOSYS; +} +#endif /* defined(CONFIG_MSM_L2_SPM) */ +#else /* defined(CONFIG_MSM_SPM) */ +static inline int msm_spm_set_low_power_mode(unsigned int mode, bool notify_rpm) +{ + return -ENOSYS; +} + +static inline int msm_spm_probe_done(void) +{ + return -ENOSYS; +} + +static inline int msm_spm_set_vdd(unsigned int cpu, unsigned int vlevel) +{ + return -ENOSYS; +} + +static inline int msm_spm_get_vdd(unsigned int cpu) +{ + return 0; +} + +static inline int msm_spm_turn_on_cpu_rail(struct device_node *l2ccc_node, + unsigned int val, int cpu, int vctl_offset) +{ + return -ENOSYS; +} + +static inline int msm_spm_device_init(void) +{ + return -ENOSYS; +} + +static inline void msm_spm_dump_regs(unsigned int cpu) +{ + return; +} + +static inline int msm_spm_config_low_power_mode(struct msm_spm_device *dev, + unsigned int mode, bool notify_rpm) +{ + return -ENODEV; +} +static inline struct msm_spm_device *msm_spm_get_device_by_name(const char *name) +{ + return NULL; +} + +static inline bool msm_spm_is_mode_avail(unsigned int mode) +{ + return false; +} + +static inline int msm_spm_avs_enable_irq(unsigned int cpu, + enum msm_spm_avs_irq irq) +{ + return -ENOSYS; +} + +static inline int msm_spm_avs_disable_irq(unsigned int cpu, + enum msm_spm_avs_irq irq) +{ + return -ENOSYS; +} + +static inline int msm_spm_avs_clear_irq(unsigned int cpu, + enum msm_spm_avs_irq irq) +{ + return -ENOSYS; +} + +#endif /* defined (CONFIG_MSM_SPM) */ +#endif /* __ARCH_ARM_MACH_MSM_SPM_H */ diff --git a/include/trace/trace_thermal.h b/include/trace/trace_thermal.h new file mode 100644 index 000000000000..0be0f47f88d2 --- /dev/null +++ b/include/trace/trace_thermal.h @@ -0,0 +1,399 @@ +/* + * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM thermal + +#if !defined(_TRACE_THERMAL_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_THERMAL_H + +#include <linux/tracepoint.h> + +#ifdef TRACE_MSM_LMH +DECLARE_EVENT_CLASS(msm_lmh_print_sensor_reading, + + TP_PROTO(const char *sensor_name, unsigned int intensity), + + TP_ARGS( + sensor_name, intensity + ), + + TP_STRUCT__entry( + __string(_name, sensor_name) + __field(unsigned int, reading) + ), + + TP_fast_assign( + __assign_str(_name, sensor_name); + __entry->reading = intensity; + ), + + TP_printk( + "Sensor:[%s] throttling intensity:%u", __get_str(_name), + __entry->reading + ) +); + +DECLARE_EVENT_CLASS(msm_lmh_print_event, + + TP_PROTO(const char *event_name), + + TP_ARGS( + event_name + ), + + TP_STRUCT__entry( + __string(_name, event_name) + ), + + TP_fast_assign( + __assign_str(_name, event_name); + ), + + TP_printk( + "Event:[%s]", __get_str(_name) + ) +); + +DEFINE_EVENT(msm_lmh_print_sensor_reading, lmh_sensor_interrupt, + + TP_PROTO(const char *sensor_name, unsigned int intensity), + + TP_ARGS(sensor_name, intensity) +); + +DEFINE_EVENT(msm_lmh_print_sensor_reading, lmh_sensor_reading, + + TP_PROTO(const char *sensor_name, unsigned int intensity), + + TP_ARGS(sensor_name, intensity) +); + +DEFINE_EVENT(msm_lmh_print_event, lmh_event_call, + + TP_PROTO(const char *event_name), + + TP_ARGS(event_name) +); + +TRACE_EVENT(lmh_debug_data, + TP_PROTO(const char *pre_data, uint32_t *data_buf, uint32_t buffer_len), + + TP_ARGS( + pre_data, data_buf, buffer_len + ), + + TP_STRUCT__entry( + __string(_data, pre_data) + __field(u32, _buffer_len) + __dynamic_array(u32, _buffer, buffer_len) + ), + + TP_fast_assign( + __assign_str(_data, pre_data); + __entry->_buffer_len = buffer_len * sizeof(uint32_t); + memcpy(__get_dynamic_array(_buffer), data_buf, + buffer_len * sizeof(uint32_t)); + ), + + TP_printk("%s:\t %s", + __get_str(_data), __print_hex(__get_dynamic_array(_buffer), + __entry->_buffer_len) + ) +); + + +#elif defined(TRACE_MSM_THERMAL) + +DECLARE_EVENT_CLASS(msm_thermal_post_core_ctl, + + TP_PROTO(unsigned int cpu, unsigned int online), + + TP_ARGS(cpu, online), + + TP_STRUCT__entry( + __field(unsigned int, cpu) + __field(unsigned int, online) + ), + + TP_fast_assign( + __entry->cpu = cpu; + __entry->online = online; + ), + + TP_printk("device=cpu%u online=%u", + __entry->cpu, __entry->online) +); +DECLARE_EVENT_CLASS(msm_thermal_pre_core_ctl, + + TP_PROTO(unsigned int cpu), + + TP_ARGS(cpu), + + TP_STRUCT__entry( + __field(unsigned int, cpu) + ), + + TP_fast_assign( + __entry->cpu = cpu; + ), + + TP_printk("device=cpu%u", __entry->cpu) +); + +DEFINE_EVENT(msm_thermal_pre_core_ctl, thermal_pre_core_offline, + + TP_PROTO(unsigned int cpu), + + TP_ARGS(cpu) +); + +DEFINE_EVENT(msm_thermal_post_core_ctl, thermal_post_core_offline, + + TP_PROTO(unsigned int cpu, unsigned int online), + + TP_ARGS(cpu, online) +); + +DEFINE_EVENT(msm_thermal_pre_core_ctl, thermal_pre_core_online, + + TP_PROTO(unsigned int cpu), + + TP_ARGS(cpu) +); + +DEFINE_EVENT(msm_thermal_post_core_ctl, thermal_post_core_online, + + TP_PROTO(unsigned int cpu, unsigned int online), + + TP_ARGS(cpu, online) +); + +DECLARE_EVENT_CLASS(msm_thermal_freq_mit, + + TP_PROTO(unsigned int cpu, unsigned int max_freq, + unsigned int min_freq), + + TP_ARGS(cpu, max_freq, min_freq), + + TP_STRUCT__entry( + __field(unsigned int, cpu) + __field(unsigned int, max_freq) + __field(unsigned int, min_freq) + ), + + TP_fast_assign( + __entry->cpu = cpu; + __entry->max_freq = max_freq; + __entry->min_freq = min_freq; + ), + + TP_printk("device=cpu%u max_frequency=%u min_frequency=%u", + __entry->cpu, __entry->max_freq, + __entry->min_freq) +); + +DEFINE_EVENT(msm_thermal_freq_mit, thermal_pre_frequency_mit, + + TP_PROTO(unsigned int cpu, unsigned int max_freq, + unsigned int min_freq), + + TP_ARGS(cpu, max_freq, min_freq) +); + +DEFINE_EVENT(msm_thermal_freq_mit, thermal_post_frequency_mit, + + TP_PROTO(unsigned int cpu, unsigned int max_freq, + unsigned int min_freq), + + TP_ARGS(cpu, max_freq, min_freq) +); + +#elif defined(_BCL_SW_TRACE) || defined(_BCL_HW_TRACE) + +DECLARE_EVENT_CLASS(msm_bcl_print_reading, + + TP_PROTO(const char *sensor_name, long value), + + TP_ARGS( + sensor_name, value + ), + + TP_STRUCT__entry( + __string(_name, sensor_name) + __field(long, reading) + ), + + TP_fast_assign( + __assign_str(_name, sensor_name); + __entry->reading = value; + ), + + TP_printk( + "%s:[%ld]", __get_str(_name), __entry->reading + ) +); + +DECLARE_EVENT_CLASS(msm_bcl_print_event, + + TP_PROTO(const char *event_name), + + TP_ARGS( + event_name + ), + + TP_STRUCT__entry( + __string(_name, event_name) + ), + + TP_fast_assign( + __assign_str(_name, event_name); + ), + + TP_printk( + "Event:[%s]", __get_str(_name) + ) +); + +#ifdef _BCL_HW_TRACE +DECLARE_EVENT_CLASS(msm_bcl_print_reg, + + TP_PROTO(const char *sensor_name, unsigned int address, + unsigned int value), + + TP_ARGS( + sensor_name, address, value + ), + + TP_STRUCT__entry( + __string(_name, sensor_name) + __field(unsigned int, _address) + __field(unsigned int, _value) + ), + + TP_fast_assign( + __assign_str(_name, sensor_name); + __entry->_address = address; + __entry->_value = value; + ), + + TP_printk( + "%s: address 0x%x: data 0x%02x", __get_str(_name), + __entry->_address, __entry->_value + ) +); + +DEFINE_EVENT(msm_bcl_print_reading, bcl_hw_sensor_reading, + + TP_PROTO(const char *sensor_name, long intensity), + + TP_ARGS(sensor_name, intensity) +); + +DEFINE_EVENT(msm_bcl_print_reg, bcl_hw_reg_access, + + TP_PROTO(const char *op_name, unsigned int address, unsigned int value), + + TP_ARGS(op_name, address, value) +); + +DEFINE_EVENT(msm_bcl_print_reading, bcl_hw_mitigation, + + TP_PROTO(const char *sensor_name, long intensity), + + TP_ARGS(sensor_name, intensity) +); + +DEFINE_EVENT(msm_bcl_print_event, bcl_hw_mitigation_event, + + TP_PROTO(const char *event_name), + + TP_ARGS(event_name) +); + +DEFINE_EVENT(msm_bcl_print_reading, bcl_hw_state_event, + + TP_PROTO(const char *sensor_name, long intensity), + + TP_ARGS(sensor_name, intensity) +); + +DEFINE_EVENT(msm_bcl_print_event, bcl_hw_event, + + TP_PROTO(const char *event_name), + + TP_ARGS(event_name) +); +#elif defined(_BCL_SW_TRACE) +DEFINE_EVENT(msm_bcl_print_reading, bcl_sw_mitigation, + + TP_PROTO(const char *sensor_name, long intensity), + + TP_ARGS(sensor_name, intensity) +); + +DEFINE_EVENT(msm_bcl_print_event, bcl_sw_mitigation_event, + + TP_PROTO(const char *event_name), + + TP_ARGS(event_name) +); +#endif /* _BCL_HW_TRACE */ +#else +DECLARE_EVENT_CLASS(tsens, + + TP_PROTO(unsigned long temp, unsigned int sensor), + + TP_ARGS(temp, sensor), + + TP_STRUCT__entry( + __field(unsigned long, temp) + __field(unsigned int, sensor) + ), + + TP_fast_assign( + __entry->temp = temp; + __entry->sensor = sensor; + ), + + TP_printk("temp=%lu sensor=tsens_tz_sensor%u", + __entry->temp, __entry->sensor) +); + +DEFINE_EVENT(tsens, tsens_read, + + TP_PROTO(unsigned long temp, unsigned int sensor), + + TP_ARGS(temp, sensor) +); + +DEFINE_EVENT(tsens, tsens_threshold_hit, + + TP_PROTO(unsigned long temp, unsigned int sensor), + + TP_ARGS(temp, sensor) +); + +DEFINE_EVENT(tsens, tsens_threshold_clear, + + TP_PROTO(unsigned long temp, unsigned int sensor), + + TP_ARGS(temp, sensor) +); +#endif +#endif +#undef TRACE_INCLUDE_PATH +#undef TRACE_INCLUDE_FILE +#define TRACE_INCLUDE_PATH . +#define TRACE_INCLUDE_FILE trace_thermal +#include <trace/define_trace.h> |