summaryrefslogtreecommitdiff
path: root/Documentation
diff options
context:
space:
mode:
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/clk-qpnp-div.txt52
1 files changed, 52 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/clk-qpnp-div.txt b/Documentation/devicetree/bindings/clock/clk-qpnp-div.txt
new file mode 100644
index 000000000000..03b7b70d7f7e
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/clk-qpnp-div.txt
@@ -0,0 +1,52 @@
+Qualcomm Technologies, Inc. QPNP clock divider (clkdiv)
+
+clkdiv configures the clock frequency of a set of outputs on the PMIC.
+These clocks are typically wired through alternate functions on
+gpio pins.
+
+=======================
+Supported Properties
+=======================
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: should be "qcom,qpnp-clkdiv".
+
+- reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: Addresses and sizes for the memory of this CLKDIV
+ peripheral.
+
+- qcom,cxo-freq
+ Usage: required
+ Value type: <u32>
+ Definition: The frequency of the crystal oscillator (CXO) clock in Hz.
+
+- qcom,clkdiv-id
+ Usage: required
+ Value type: <u32>
+ Definition: Integer value specifies the hardware identifier of this
+ CLKDIV peripheral.
+
+- qcom,clkdiv-init-freq
+ Usage: optional
+ Value type: <u32>
+ Definition: Initial output frequency in Hz to configure for the CLKDIV
+ peripheral. The initial frequency value should be less than
+ or equal to CXO clock frequency and greater than or equal to
+ CXO_freq/64.
+
+=======
+Example
+=======
+
+qcom,clkdiv@5b00 {
+ compatible = "qcom,qpnp-clkdiv";
+ reg = <0x5b00 0x100>;
+
+ qcom,cxo-freq = <19200000>;
+ qcom,clkdiv-id = <1>;
+ qcom,clkdiv-init-freq = <9600000>;
+};