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-rw-r--r--drivers/gpu/drm/msm/adreno/a3xx_gpu.c1
-rw-r--r--drivers/gpu/drm/msm/adreno/a4xx_gpu.c1
-rw-r--r--drivers/gpu/drm/msm/adreno/a5xx_counters.c2
-rw-r--r--drivers/gpu/drm/msm/adreno/a5xx_gpu.c11
-rw-r--r--drivers/gpu/drm/msm/adreno/a5xx_gpu.h2
-rw-r--r--drivers/gpu/drm/msm/adreno/a5xx_preempt.c7
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.c11
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.h1
-rw-r--r--drivers/gpu/drm/msm/msm_drv.c3
-rw-r--r--drivers/gpu/drm/msm/msm_drv.h1
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.c25
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.h5
-rw-r--r--drivers/gpu/drm/msm/msm_ringbuffer.h2
-rw-r--r--drivers/gpu/drm/msm/msm_submitqueue.c4
14 files changed, 37 insertions, 39 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index a417e42944fc..e24827590b7c 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -439,7 +439,6 @@ static const struct adreno_gpu_funcs funcs = {
.pm_suspend = msm_gpu_pm_suspend,
.pm_resume = msm_gpu_pm_resume,
.recover = a3xx_recover,
- .last_fence = adreno_last_fence,
.submitted_fence = adreno_submitted_fence,
.submit = adreno_submit,
.flush = adreno_flush,
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index 069823f054f7..b612c9a18faf 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -522,7 +522,6 @@ static const struct adreno_gpu_funcs funcs = {
.pm_suspend = a4xx_pm_suspend,
.pm_resume = a4xx_pm_resume,
.recover = a4xx_recover,
- .last_fence = adreno_last_fence,
.submitted_fence = adreno_submitted_fence,
.submit = adreno_submit,
.flush = adreno_flush,
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_counters.c b/drivers/gpu/drm/msm/adreno/a5xx_counters.c
index f1fac5535359..bc442039c308 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_counters.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_counters.c
@@ -106,7 +106,7 @@ static void a5xx_counter_enable_pm4(struct msm_gpu *gpu,
{
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
- struct msm_ringbuffer *ring = gpu->rb[MSM_GPU_MAX_RINGS - 1];
+ struct msm_ringbuffer *ring = gpu->rb[0];
struct adreno_counter *counter = &group->counters[counterid];
mutex_lock(&gpu->dev->struct_mutex);
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index e27ea604ac5b..37323e962c2c 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -774,6 +774,9 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
gpu_write(gpu, REG_A5XX_TPL1_ADDR_MODE_CNTL, 0x1);
gpu_write(gpu, REG_A5XX_RBBM_SECVID_TSB_ADDR_MODE_CNTL, 0x1);
+ a5xx_gpu->timestamp_counter = adreno_get_counter(gpu,
+ MSM_COUNTER_GROUP_CP, 0, NULL, NULL);
+
/* Load the GPMU firmware before starting the HW init */
a5xx_gpmu_ucode_init(gpu);
@@ -1218,8 +1221,11 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
{
- *value = gpu_read64(gpu, REG_A5XX_RBBM_PERFCTR_CP_0_LO,
- REG_A5XX_RBBM_PERFCTR_CP_0_HI);
+ struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+ struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
+
+ *value = adreno_read_counter(gpu, MSM_COUNTER_GROUP_CP,
+ a5xx_gpu->timestamp_counter);
return 0;
}
@@ -1252,7 +1258,6 @@ static const struct adreno_gpu_funcs funcs = {
.pm_suspend = a5xx_pm_suspend,
.pm_resume = a5xx_pm_resume,
.recover = a5xx_recover,
- .last_fence = adreno_last_fence,
.submitted_fence = adreno_submitted_fence,
.submit = a5xx_submit,
.flush = a5xx_flush,
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.h b/drivers/gpu/drm/msm/adreno/a5xx_gpu.h
index 8eb3838ffe90..f8b00982fe86 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.h
@@ -56,6 +56,8 @@ struct a5xx_gpu {
struct a5xx_smmu_info *smmu_info;
struct drm_gem_object *smmu_info_bo;
uint64_t smmu_info_iova;
+
+ int timestamp_counter;
};
#define to_a5xx_gpu(x) container_of(x, struct a5xx_gpu, base)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
index 57ef366cf82c..6ab3ba076c2f 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
@@ -68,7 +68,12 @@ static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu)
unsigned long flags;
int i;
- for (i = gpu->nr_rings - 1; i >= 0; i--) {
+ /*
+ * Find the highest prority ringbuffer that isn't empty and jump
+ * to it (0 being the highest and gpu->nr_rings - 1 being the
+ * lowest)
+ */
+ for (i = 0; i < gpu->nr_rings; i++) {
bool empty;
struct msm_ringbuffer *ring = gpu->rb[i];
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 2a5683e3034b..2273b06b59a6 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -130,11 +130,6 @@ uint32_t adreno_submitted_fence(struct msm_gpu *gpu,
return ring->submitted_fence;
}
-uint32_t adreno_last_fence(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
-{
- return ring ? ring->memptrs->fence : 0;
-}
-
void adreno_recover(struct msm_gpu *gpu)
{
struct drm_device *dev = gpu->dev;
@@ -294,7 +289,7 @@ void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
continue;
seq_printf(m, "rb %d: fence: %d/%d\n", i,
- adreno_last_fence(gpu, ring),
+ ring->memptrs->fence,
adreno_submitted_fence(gpu, ring));
seq_printf(m, " rptr: %d\n",
@@ -344,7 +339,7 @@ void adreno_dump_info(struct msm_gpu *gpu)
continue;
dev_err(dev->dev, " ring %d: fence %d/%d rptr/wptr %x/%x\n", i,
- adreno_last_fence(gpu, ring),
+ ring->memptrs->fence,
adreno_submitted_fence(gpu, ring),
get_rptr(adreno_gpu, ring),
get_wptr(ring));
@@ -603,7 +598,7 @@ static void adreno_snapshot_ringbuffer(struct msm_gpu *gpu,
header.rptr = get_rptr(adreno_gpu, ring);
header.wptr = get_wptr(ring);
header.timestamp_queued = adreno_submitted_fence(gpu, ring);
- header.timestamp_retired = adreno_last_fence(gpu, ring);
+ header.timestamp_retired = ring->memptrs->fence;
/* Write the header even if the ringbuffer data is empty */
if (!SNAPSHOT_HEADER(snapshot, header, SNAPSHOT_SECTION_RB_V2,
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index c894956fb5e8..c96189fb805b 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -217,7 +217,6 @@ static inline int adreno_is_a540(struct adreno_gpu *gpu)
int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
int adreno_hw_init(struct msm_gpu *gpu);
-uint32_t adreno_last_fence(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
uint32_t adreno_submitted_fence(struct msm_gpu *gpu,
struct msm_ringbuffer *ring);
void adreno_recover(struct msm_gpu *gpu);
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 2280f8cb7183..924ce64206f4 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1760,7 +1760,8 @@ static int msm_ioctl_submitqueue_new(struct drm_device *dev, void *data,
if (args->flags & ~MSM_SUBMITQUEUE_FLAGS)
return -EINVAL;
- if (!file->is_master && args->prio >= gpu->nr_rings - 1) {
+ if ((gpu->nr_rings > 1) &&
+ (!file->is_master && args->prio == 0)) {
DRM_ERROR("Only DRM master can set highest priority ringbuffer\n");
return -EPERM;
}
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index d696f05e0459..ac15f399df7d 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -297,7 +297,6 @@ struct msm_drm_private {
struct drm_fb_helper *fbdev;
- uint32_t next_fence[MSM_GPU_MAX_RINGS];
uint32_t completed_fence[MSM_GPU_MAX_RINGS];
wait_queue_head_t fence_event;
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index 6bac1cf6f7c5..8073898e4275 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -310,8 +310,7 @@ static void recover_worker(struct work_struct *work)
/* Retire all events that have already passed */
FOR_EACH_RING(gpu, ring, i)
- retire_submits(gpu, ring,
- gpu->funcs->last_fence(gpu, ring));
+ retire_submits(gpu, ring, ring->memptrs->fence);
retire_guilty_submit(gpu, gpu->funcs->active_ring(gpu));
@@ -319,7 +318,7 @@ static void recover_worker(struct work_struct *work)
gpu->funcs->recover(gpu);
/* Replay the remaining on all rings, highest priority first */
- for (i = gpu->nr_rings - 1; i >= 0; i--) {
+ for (i = 0; i < gpu->nr_rings; i++) {
struct msm_ringbuffer *ring = gpu->rb[i];
list_for_each_entry(submit, &ring->submits, node)
@@ -344,16 +343,16 @@ static void hangcheck_handler(unsigned long data)
struct drm_device *dev = gpu->dev;
struct msm_drm_private *priv = dev->dev_private;
struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu);
- uint32_t fence = gpu->funcs->last_fence(gpu, ring);
+ uint32_t fence = ring->memptrs->fence;
uint32_t submitted = gpu->funcs->submitted_fence(gpu, ring);
- if (fence != gpu->hangcheck_fence[ring->id]) {
+ if (fence != ring->hangcheck_fence) {
/* some progress has been made.. ya! */
- gpu->hangcheck_fence[ring->id] = fence;
+ ring->hangcheck_fence = fence;
} else if (fence < submitted) {
struct msm_gem_submit *submit;
- gpu->hangcheck_fence[ring->id] = fence;
+ ring->hangcheck_fence = fence;
/*
* No progress done, but see if the current submit is
@@ -379,7 +378,7 @@ static void hangcheck_handler(unsigned long data)
out:
/* if still more pending work, reset the hangcheck timer: */
- if (submitted > gpu->hangcheck_fence[ring->id])
+ if (submitted > ring->hangcheck_fence)
hangcheck_timer_reset(gpu);
/* workaround for missing irq: */
@@ -542,16 +541,13 @@ static void retire_worker(struct work_struct *work)
int i;
FOR_EACH_RING(gpu, ring, i) {
- uint32_t fence;
-
if (!ring)
continue;
- fence = gpu->funcs->last_fence(gpu, ring);
- msm_update_fence(gpu->dev, fence);
+ msm_update_fence(gpu->dev, ring->memptrs->fence);
mutex_lock(&dev->struct_mutex);
- _retire_ring(gpu, ring, fence);
+ _retire_ring(gpu, ring, ring->memptrs->fence);
mutex_unlock(&dev->struct_mutex);
}
@@ -571,13 +567,12 @@ void msm_gpu_retire(struct msm_gpu *gpu)
int msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
{
struct drm_device *dev = gpu->dev;
- struct msm_drm_private *priv = dev->dev_private;
struct msm_ringbuffer *ring = gpu->rb[submit->ring];
int i;
WARN_ON(!mutex_is_locked(&dev->struct_mutex));
- submit->fence = FENCE(submit->ring, ++priv->next_fence[submit->ring]);
+ submit->fence = FENCE(submit->ring, ++ring->seqno);
inactive_cancel(gpu);
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 306139bcd103..eeebfb746f7f 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -64,8 +64,6 @@ struct msm_gpu_funcs {
void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit);
void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
irqreturn_t (*irq)(struct msm_gpu *irq);
- uint32_t (*last_fence)(struct msm_gpu *gpu,
- struct msm_ringbuffer *ring);
uint32_t (*submitted_fence)(struct msm_gpu *gpu,
struct msm_ringbuffer *ring);
struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
@@ -147,7 +145,6 @@ struct msm_gpu {
#define DRM_MSM_HANGCHECK_PERIOD 500 /* in ms */
#define DRM_MSM_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_MSM_HANGCHECK_PERIOD)
struct timer_list hangcheck_timer;
- uint32_t hangcheck_fence[MSM_GPU_MAX_RINGS];
struct work_struct recover_work;
struct msm_snapshot *snapshot;
};
@@ -186,7 +183,7 @@ static inline bool msm_gpu_active(struct msm_gpu *gpu)
FOR_EACH_RING(gpu, ring, i) {
if (gpu->funcs->submitted_fence(gpu, ring) >
- gpu->funcs->last_fence(gpu, ring))
+ ring->memptrs->fence)
return true;
}
diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h b/drivers/gpu/drm/msm/msm_ringbuffer.h
index b19ce75a4cc9..e9678d57fffd 100644
--- a/drivers/gpu/drm/msm/msm_ringbuffer.h
+++ b/drivers/gpu/drm/msm/msm_ringbuffer.h
@@ -47,9 +47,11 @@ struct msm_ringbuffer {
struct drm_gem_object *bo;
uint32_t *start, *end, *cur, *next;
uint64_t iova;
+ uint32_t seqno;
uint32_t submitted_fence;
spinlock_t lock;
struct list_head submits;
+ uint32_t hangcheck_fence;
struct msm_memptrs *memptrs;
uint64_t memptrs_iova;
diff --git a/drivers/gpu/drm/msm/msm_submitqueue.c b/drivers/gpu/drm/msm/msm_submitqueue.c
index 4f2af876db49..f79e74071c79 100644
--- a/drivers/gpu/drm/msm/msm_submitqueue.c
+++ b/drivers/gpu/drm/msm/msm_submitqueue.c
@@ -92,10 +92,10 @@ int msm_submitqueue_init(struct msm_file_private *ctx)
/*
* Add the "default" submitqueue with id 0
- * "medium" priority (3) and no flags
+ * "low" priority (2) and no flags
*/
- return msm_submitqueue_create(ctx, 3, 0, NULL);
+ return msm_submitqueue_create(ctx, 2, 0, NULL);
}
int msm_submitqueue_query(struct msm_file_private *ctx, u32 id, u32 param,
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-12 05:02:28 +0000