diff options
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-rumi.dts | 63 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi | 63 |
2 files changed, 63 insertions, 63 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-rumi.dts b/arch/arm/boot/dts/qcom/msmcobalt-rumi.dts index 3500e36ceeeb..30a3700c4e70 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-rumi.dts +++ b/arch/arm/boot/dts/qcom/msmcobalt-rumi.dts @@ -34,69 +34,6 @@ status = "disabled"; }; -&clock_cpu { - qcom,cc-factor = <10>; - qcom,osm-clk-rate = <2000000>; - qcom,xo-clk-rate = <333333>; - - qcom,pwrcl-speedbin0-v0 = - < 300000000 0x4000f 0x31e001e >, - < 345600000 0x5040012 0x4200020 >, - < 422400000 0x5040016 0x4200020 >, - < 499200000 0x504001a 0x5200020 >, - < 576000000 0x504001e 0x6200020 >, - < 633600000 0x4040021 0x7200020 >, - < 710400000 0x4040025 0x7200020 >, - < 748800000 0x4030027 0x7200020 >, - < 768000000 0x4020028 0x7200020 >, - < 787200000 0x4010029 0x7200020 >, - < 806400000 0x404002a 0x8220022 >, - < 883200000 0x404002e 0x9250025 >, - < 960000000 0x4040032 0xa280028 >, - < 1036800000 0x4040036 0xb2b002b >, - < 1113600000 0x404003a 0xc2e002e >, - < 1190400000 0x404003e 0xc320032 >, - < 1248000000 0x4040041 0xd340034 >, - < 1324800000 0x4040045 0xe370037 >, - < 1401600000 0x4040049 0xf3a003a >, - < 1478400000 0x404004d 0x103e003e >, - < 1574400000 0x4040052 0x10420042 >, - < 1651200000 0x4040056 0x11450045 >, - < 1728000000 0x404005a 0x12480048 >, - < 1804800000 0x404005e 0x134b004b >, - < 1881600000 0x4040062 0x144e004e >; - - qcom,perfcl-speedbin0-v0 = - < 300000000 0x4000f 0x3200020 >, - < 345600000 0x5040012 0x4200020 >, - < 422400000 0x5040016 0x4200020 >, - < 480000000 0x5040019 0x5200020 >, - < 556800000 0x504001d 0x6200020 >, - < 633600000 0x4040021 0x7200020 >, - < 652800000 0x4030022 0x7200020 >, - < 672000000 0x4020023 0x7200020 >, - < 691200000 0x4010024 0x7200020 >, - < 710400000 0x4040025 0x7200020 >, - < 787200000 0x4040029 0x8210021 >, - < 844800000 0x404002c 0x9240024 >, - < 902400000 0x404002f 0x9260026 >, - < 979200000 0x4040033 0xa290029 >, - < 1056000000 0x4040037 0xb2c002c >, - < 1171200000 0x404003d 0xc300030 >, - < 1248000000 0x4040041 0xd340034 >, - < 1324800000 0x4040045 0xe370037 >, - < 1401600000 0x4040049 0xf3b003b >, - < 1478400000 0x404004d 0xf3e003e >, - < 1536000000 0x4040050 0x10400040 >, - < 1632000000 0x4040055 0x11440044 >, - < 1708800000 0x4040059 0x12480048 >, - < 1785600000 0x404005d 0x134a004a >, - < 1862400000 0x4040061 0x134e004e >, - < 1939200000 0x4040065 0x14510051 >, - < 2016000000 0x4040069 0x15540054 >, - < 2092800000 0x404006d 0x16570057 >; -}; - &apc0_cpr { qcom,cpr-initial-temp-band = <3>; qcom,cpr-temp-point-map = <0 25 85>; diff --git a/arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi index a7ac03502894..fcd28c6e163b 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi @@ -58,6 +58,69 @@ status = "ok"; }; +&clock_cpu { + qcom,cc-factor = <10>; + qcom,osm-clk-rate = <2000000>; + qcom,xo-clk-rate = <333333>; + + qcom,pwrcl-speedbin0-v0 = + < 300000000 0x4000f 0x31e001e >, + < 345600000 0x5040012 0x4200020 >, + < 422400000 0x5040016 0x4200020 >, + < 499200000 0x504001a 0x5200020 >, + < 576000000 0x504001e 0x6200020 >, + < 633600000 0x4040021 0x7200020 >, + < 710400000 0x4040025 0x7200020 >, + < 748800000 0x4030027 0x7200020 >, + < 768000000 0x4020028 0x7200020 >, + < 787200000 0x4010029 0x7200020 >, + < 806400000 0x404002a 0x8220022 >, + < 883200000 0x404002e 0x9250025 >, + < 960000000 0x4040032 0xa280028 >, + < 1036800000 0x4040036 0xb2b002b >, + < 1113600000 0x404003a 0xc2e002e >, + < 1190400000 0x404003e 0xc320032 >, + < 1248000000 0x4040041 0xd340034 >, + < 1324800000 0x4040045 0xe370037 >, + < 1401600000 0x4040049 0xf3a003a >, + < 1478400000 0x404004d 0x103e003e >, + < 1574400000 0x4040052 0x10420042 >, + < 1651200000 0x4040056 0x11450045 >, + < 1728000000 0x404005a 0x12480048 >, + < 1804800000 0x404005e 0x134b004b >, + < 1881600000 0x4040062 0x144e004e >; + + qcom,perfcl-speedbin0-v0 = + < 300000000 0x4000f 0x3200020 >, + < 345600000 0x5040012 0x4200020 >, + < 422400000 0x5040016 0x4200020 >, + < 480000000 0x5040019 0x5200020 >, + < 556800000 0x504001d 0x6200020 >, + < 633600000 0x4040021 0x7200020 >, + < 652800000 0x4030022 0x7200020 >, + < 672000000 0x4020023 0x7200020 >, + < 691200000 0x4010024 0x7200020 >, + < 710400000 0x4040025 0x7200020 >, + < 787200000 0x4040029 0x8210021 >, + < 844800000 0x404002c 0x9240024 >, + < 902400000 0x404002f 0x9260026 >, + < 979200000 0x4040033 0xa290029 >, + < 1056000000 0x4040037 0xb2c002c >, + < 1171200000 0x404003d 0xc300030 >, + < 1248000000 0x4040041 0xd340034 >, + < 1324800000 0x4040045 0xe370037 >, + < 1401600000 0x4040049 0xf3b003b >, + < 1478400000 0x404004d 0xf3e003e >, + < 1536000000 0x4040050 0x10400040 >, + < 1632000000 0x4040055 0x11440044 >, + < 1708800000 0x4040059 0x12480048 >, + < 1785600000 0x404005d 0x134a004a >, + < 1862400000 0x4040061 0x134e004e >, + < 1939200000 0x4040065 0x14510051 >, + < 2016000000 0x4040069 0x15540054 >, + < 2092800000 0x404006d 0x16570057 >; +}; + &soc { qcom,icnss@18800000 { compatible = "qcom,icnss"; |