diff options
| -rw-r--r-- | drivers/gpu/drm/msm/sde/sde_encoder.c | 17 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/sde/sde_encoder_phys.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c | 23 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/sde/sde_kms.h | 7 |
6 files changed, 46 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/sde/sde_encoder.c b/drivers/gpu/drm/msm/sde/sde_encoder.c index 67190a3448d0..773bc02aac7f 100644 --- a/drivers/gpu/drm/msm/sde/sde_encoder.c +++ b/drivers/gpu/drm/msm/sde/sde_encoder.c @@ -837,6 +837,23 @@ int sde_encoder_wait_for_commit_done(struct drm_encoder *drm_enc) return ret; } +enum sde_intf_mode sde_encoder_get_intf_mode(struct drm_encoder *encoder) +{ + struct sde_encoder_virt *sde_enc = NULL; + enum sde_intf_mode intf_mode = INTF_MODE_NONE; + + if (!encoder) { + SDE_ERROR("invalid encoder\n"); + return INTF_MODE_NONE; + } + + sde_enc = to_sde_encoder_virt(encoder); + if (sde_enc->cur_master) + intf_mode = sde_enc->cur_master->intf_mode; + + return intf_mode; +} + /* encoders init, * initialize encoder based on displays */ diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys.h b/drivers/gpu/drm/msm/sde/sde_encoder_phys.h index e63c2b31f425..e17486c6e934 100644 --- a/drivers/gpu/drm/msm/sde/sde_encoder_phys.h +++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys.h @@ -136,6 +136,7 @@ enum sde_enc_enable_state { * @cached_mode: DRM mode cached at mode_set time, acted on in enable * @enabled: Whether the encoder has enabled and running a mode * @split_role: Role to play in a split-panel configuration + * @intf_mode: Interface mode * @spin_lock: Lock for IRQ purposes * @mode_3d: 3D mux configuration * @enable_state: Enable state tracking @@ -152,6 +153,7 @@ struct sde_encoder_phys { struct sde_kms *sde_kms; struct drm_display_mode cached_mode; enum sde_enc_split_role split_role; + enum sde_intf_mode intf_mode; spinlock_t spin_lock; enum sde_3d_blend_mode mode_3d; enum sde_enc_enable_state enable_state; diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c b/drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c index 64c69dabd862..9cb9ecf30600 100644 --- a/drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c @@ -499,6 +499,7 @@ struct sde_encoder_phys *sde_encoder_phys_cmd_init( phys_enc->parent_ops = p->parent_ops; phys_enc->sde_kms = p->sde_kms; phys_enc->split_role = p->split_role; + phys_enc->intf_mode = INTF_MODE_CMD; spin_lock_init(&phys_enc->spin_lock); phys_enc->mode_3d = BLEND_3D_NONE; cmd_enc->stream_sel = 0; diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c b/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c index cb9f2c11c689..ee5d010a77e1 100644 --- a/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c @@ -668,6 +668,7 @@ struct sde_encoder_phys *sde_encoder_phys_vid_init( phys_enc->parent_ops = p->parent_ops; phys_enc->sde_kms = p->sde_kms; phys_enc->split_role = p->split_role; + phys_enc->intf_mode = INTF_MODE_VIDEO; spin_lock_init(&phys_enc->spin_lock); init_completion(&vid_enc->vblank_completion); diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c b/drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c index c94ee486d8b1..1adf5533ea87 100644 --- a/drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c +++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c @@ -154,14 +154,21 @@ static void sde_encoder_phys_wb_setup_fb(struct sde_encoder_phys *phys_enc, struct drm_framebuffer *fb, struct sde_rect *wb_roi) { struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc); - struct sde_hw_wb *hw_wb = wb_enc->hw_wb; - struct sde_hw_wb_cfg *wb_cfg = &wb_enc->wb_cfg; + struct sde_hw_wb *hw_wb; + struct sde_hw_wb_cfg *wb_cfg; const struct msm_format *format; int ret, mmu_id; + if (!phys_enc) { + SDE_ERROR("invalid encoder\n"); + return; + } + + hw_wb = wb_enc->hw_wb; + wb_cfg = &wb_enc->wb_cfg; memset(wb_cfg, 0, sizeof(struct sde_hw_wb_cfg)); - wb_cfg->intf_mode = INTF_MODE_WB_LINE; + wb_cfg->intf_mode = phys_enc->intf_mode; wb_cfg->is_secure = (fb->flags & DRM_MODE_FB_SECURE) ? true : false; mmu_id = (wb_cfg->is_secure) ? wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] : @@ -806,10 +813,15 @@ static void sde_encoder_phys_wb_get_hw_resources( struct drm_connector_state *conn_state) { struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc); - struct sde_hw_wb *hw_wb = wb_enc->hw_wb; + struct sde_hw_wb *hw_wb; + if (!phys_enc) { + SDE_ERROR("invalid encoder\n"); + return; + } + hw_wb = wb_enc->hw_wb; SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0); - hw_res->wbs[hw_wb->idx - WB_0] = INTF_MODE_WB_LINE; + hw_res->wbs[hw_wb->idx - WB_0] = phys_enc->intf_mode; hw_res->needs_cdm = phys_enc->needs_cdm; } @@ -1006,6 +1018,7 @@ struct sde_encoder_phys *sde_encoder_phys_wb_init( phys_enc->parent_ops = p->parent_ops; phys_enc->sde_kms = p->sde_kms; phys_enc->split_role = p->split_role; + phys_enc->intf_mode = INTF_MODE_WB_LINE; spin_lock_init(&phys_enc->spin_lock); ret = sde_encoder_phys_wb_init_debugfs(phys_enc, p->sde_kms); diff --git a/drivers/gpu/drm/msm/sde/sde_kms.h b/drivers/gpu/drm/msm/sde/sde_kms.h index 3e2d18fbdf86..6f1628151511 100644 --- a/drivers/gpu/drm/msm/sde/sde_kms.h +++ b/drivers/gpu/drm/msm/sde/sde_kms.h @@ -605,6 +605,13 @@ void sde_encoder_schedule_kickoff(struct drm_encoder *encoder, int sde_encoder_wait_for_commit_done(struct drm_encoder *drm_encoder); /** + * sde_encoder_get_intf_mode - returns current underlying interface mode + * @encoder: encoder pointer + * Returns: Interface mode of underlying physical master encoder + */ +enum sde_intf_mode sde_encoder_get_intf_mode(struct drm_encoder *encoder); + +/** * sde_encoders_init - query platform, create all encoders and bridges, * and register them with the drm_device * @dev: drm device pointer |