diff options
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt.dtsi | 51 |
1 files changed, 45 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index dfc2f79b49b8..788f27a55e86 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -1042,10 +1042,11 @@ #size-cells = <1>; ranges; - interrupts = <0 133 0>, <0 180 0>; - interrupt-names = "hs_phy_irq", "pwr_event_irq"; + interrupts = <0 347 0>, <0 243 0>, <0 180 0>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", "pwr_event_irq"; USB3_GDSC-supply = <&gdsc_usb30>; + qcom,usb-dbm = <&dbm_1p5>; qcom,msm-bus,name = "usb3"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; @@ -1077,11 +1078,43 @@ snps,nominal-elastic-buffer; snps,hird_thresh = <0x10>; }; - }; - qusb_phy0: qusb@c012200 { + qcom,usbbam@a904000 { + compatible = "qcom,usb-bam-msm"; + reg = <0xa904000 0x3000>; + interrupt-parent = <&intc>; + interrupts = <0 132 0>; + + qcom,bam-type = <0>; + qcom,usb-bam-fifo-baseaddr = <0x146bb000>; + qcom,usb-bam-num-pipes = <8>; + qcom,ignore-core-reset-ack; + qcom,disable-clk-gating; + qcom,usb-bam-override-threshold = <0x4001>; + qcom,usb-bam-max-mbps-highspeed = <400>; + qcom,usb-bam-max-mbps-superspeed = <3600>; + qcom,reset-bam-on-connect; + + qcom,pipe0 { + label = "ssusb-qdss-in-0"; + qcom,usb-bam-mem-type = <2>; + qcom,dir = <1>; + qcom,pipe-num = <0>; + qcom,peer-bam = <0>; + qcom,peer-bam-physical-address = <0x6064000>; + qcom,src-bam-pipe-index = <0>; + qcom,dst-bam-pipe-index = <0>; + qcom,data-fifo-offset = <0x0>; + qcom,data-fifo-size = <0x1800>; + qcom,descriptor-fifo-offset = <0x1800>; + qcom,descriptor-fifo-size = <0x800>; + }; + }; + }; + + qusb_phy0: qusb@c012000 { compatible = "qcom,qusb2phy"; - reg = <0x0c012200 0xb0>, + reg = <0x0c012000 0x2a8>, <0x0a8f8800 0x400>, <0x0078024c 0x4>; reg-names = "qusb_phy_base", @@ -1112,7 +1145,7 @@ ssphy: ssphy@c010000 { compatible = "qcom,usb-ssphy-qmp-v2"; - reg = <0x0c010000 0xbf8>, + reg = <0x0c010000 0xe0c>, <0x01fcb244 0x4>; reg-names = "qmp_phy_base", "vls_clamp_reg"; @@ -1254,6 +1287,12 @@ "phy_phy_reset", "ref_clk_src", "ref_clk"; }; + dbm_1p5: dbm@a8f8000 { + compatible = "qcom,usb-dbm-1p5"; + reg = <0xa8f8000 0x300>; + qcom,reset-ep-after-lpm-resume; + }; + qcom,lpass@17300000 { compatible = "qcom,pil-tz-generic"; reg = <0x17300000 0x00100>; |