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| author | Prasad Sodagudi <psodagud@codeaurora.org> | 2017-01-12 10:11:39 -0800 |
|---|---|---|
| committer | Prasad Sodagudi <psodagud@codeaurora.org> | 2017-01-13 18:02:42 -0800 |
| commit | 7b2f8ee7696e33566aa8e3ed523d70994184c7bc (patch) | |
| tree | 00524a1a9dc343fdff6ac2c532648d1feb0970b2 /tools/perf/util/trace-event-scripting.c | |
| parent | cea5fb94484444f7acd47c41d165d648a4df29f9 (diff) | |
arm64: Potential rollover condition for timer counter
There is potential rollover condition for CNTVCT and
CNTPCT counters. So on any architecture timer counter
read, if the least significant 32 bits are set,
reread counter.
CRs-Fixed: 1074621
Change-Id: I136a5f0ee04deeb74c03800d591e44fbd9b4dd39
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Diffstat (limited to 'tools/perf/util/trace-event-scripting.c')
0 files changed, 0 insertions, 0 deletions