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| author | Govind Singh <govinds@codeaurora.org> | 2017-06-08 12:33:59 +0530 |
|---|---|---|
| committer | snandini <snandini@codeaurora.org> | 2017-06-22 04:52:02 -0700 |
| commit | fed15afa34e15660fb6f9d5bbba61ab0d45e1951 (patch) | |
| tree | c7707e99efeb0dfd74ac39f651bf7c05065b0bab /tools/perf/scripts/python | |
| parent | f71d45229fbdcde77745cb6de4b5261661a86265 (diff) | |
qcacmn: Do not allow CE register access when recovery is in progress
Currently, Shadow registers is not implemented for all registers.
This can lead to unclocked access and followed by NOC errors.
In Rx path Interrupt Status and src/dst read index are directly
accessed without shadow block. Target may execute
reset sequence due to PDR/SSR while rx path is active.
Avoid direct access to below registers if target is crashed due
to PDR/SSR.
HOST_IE_ADDRESS
HOST_IS_ADDRESS
CURRENT_DRRI_ADDRESS
CURRENT_SRRI_ADDRESS
Return from ISR without scheduling the bottom half if target is
crashed due to PDR/SSR.
Change-Id: Ifa993e978579b4d061d21281338494292e19700a
CRs-Fixed: 2058451
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions