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authorRodrigo Vivi <rodrigo.vivi@intel.com>2014-11-19 07:37:00 -0800
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-12-03 09:35:08 +0100
commite2bbc343de8ea463af9da810b6e5e32dbd636b44 (patch)
tree6be98742806f0e921aff1a6f8ef1bc049e1d9577 /tools/perf/scripts/python
parentc8f7df58f711e02b0788b75c054c6d32056ea170 (diff)
drm/i915: PSR VLV/CHV: Introduce setup, enable and disable functions
The biggest difference from HSW/BDW PSR here is that VLV enable_source function enables PSR but let it in Inactive state. So it might be called on early stage along with setup and enable_sink ones. v2: Rebase over intel_psr.c; Remove docs from static functions; Merge vlv_psr_active_on_pipe; Timeout for psr transition is 250us; Remove SRC_TRASMITTER_STATE; v3: Rebase after is_psr_enabled function got removed; Get SRC_TRANSMITTER_STATE back to be on the safe side since default for panels is to require link training on exit when main link off; As pointed out by Durgadoss msecs_to_jiffies used on wait_for only uses int, so let's use 1 instead. Althought the 1/4 of this is needed for the transition let's use 1 for simplicity; Cc: Durgadoss R <durgadoss.r@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Durgadoss R <durgadoss.r@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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