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authorVenkat Gopalakrishnan <venkatg@codeaurora.org>2016-09-26 15:49:49 -0700
committerVenkat Gopalakrishnan <venkatg@codeaurora.org>2016-10-10 17:15:15 -0700
commite2844f4fdba0c8f8c6955aef975f29a59ebbd6d9 (patch)
tree46adfb721ba07e5fa726fd2a8bbd5ff41ead5938 /tools/perf/scripts/python
parentdfd06cdff2c74deae4e08d759d39d63579a14885 (diff)
scsi: ufs: gate ref_clk during aggressive clk gating
The clock gating work has been moved to using hrtimer based delay guaranteeing hibern8 to finish before we gate the clocks. This allows us to gate the ref clock along with other ufs clocks during aggressive clock gating. The latencies involved in voting/ devoting ref clk is acceptable and helps in saving more power. Change-Id: I92b86fad25041311d00fbfc58b3d5620ade7ee38 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
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