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authorJeff McGee <jeff.mcgee@intel.com>2015-04-03 18:13:16 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-04-09 15:57:56 +0200
commitdead16e2c34343f0e12ee71cd50c9398440e2556 (patch)
treed4ca6ea68f79ec3bbe22c2daa3cad85ecc6a4479 /tools/perf/scripts/python
parent9705ad8a9684c5b4952263821e07929ca3856fd1 (diff)
drm/i915/bxt: Determine BXT slice/subslice/EU info
Modify the Gen9 SSEU info initialization logic to support Broxton. Broxton reuses the SKL fuse registers but has at most 1 slice and 6 EU per subslice. Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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