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| author | David Collins <collinsd@codeaurora.org> | 2016-04-04 15:16:30 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-04-05 02:39:30 -0700 |
| commit | d6a2cb240f418a3d60f9ee77de6506827a1e301c (patch) | |
| tree | 0b83424d81c02246aaebe94fb9cf5e3d1592ab77 /tools/perf/scripts/python | |
| parent | 80e624f1738b514d0cc69343e4dc6e64ea498ae1 (diff) | |
ARM: dts: msm: set VDD_APCC CPR IRQ affinity for CPU0/1 on msm8996pro
Set the CPR IRQ affinity of the VDD_APCC CPR3 controller to be
both cores of the APPS power cluster (i.e. CPU0 and CPU1). This
ensures that neither of the CPU cores of the performance cluster
will be woken up to service a VDD_APCC CPR IRQ which was
generated when the last performance cluster core power collapsed.
Change-Id: I055e50ffcb85622ddd67d55b44d77c342e9ec074
CRs-Fixed: 949650
Signed-off-by: David Collins <collinsd@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions