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| author | Padmanabhan Komanduru <pkomandu@codeaurora.org> | 2016-02-25 14:16:27 +0530 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-25 16:02:29 -0700 |
| commit | ce96391696a5adb76bad05e17e0e2821c6a98bbe (patch) | |
| tree | 0474f8cc92b2a72c14fac6ce27468073737d0143 /tools/perf/scripts/python | |
| parent | dcb00350919eb1d03e8b643ef1dbc53262685679 (diff) | |
clk: msm: mdss: update the programming of DYNAMIC_REFRESH_PLL_UPPER_ADDR2
As part of dynamic refresh sequence, we program PLL_UPPER_ADDR2 register to
0x003FFE00 instead of 0x001FFE00. This causes a register write to
DSIPHY_PLL_KVCO_COUNT1 to 0x1 during the dynamic refresh operation whereas
the register write is supposed to happen for DSIPHY_CMN_PLL_CNTRL register.
Update the write value to DYNAMIC_REFRESH_PLL_UPPER_ADDR2 to take care
of this.
Change-Id: I991920d5a45e79670a4a033c8a83bef6c7f3136b
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions