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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2012-10-23 18:29:56 -0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-10-26 10:24:46 +0200
commitbb523fc08d4a4a726c7555be7800735685888b3c (patch)
tree3aa2507ec86ff7d9b65038faa3926246c9954126 /tools/perf/scripts/python
parenta5c961d1f3a9ab5ba0e5706e866192f8108143fe (diff)
drm/i915: convert PIPE_CLK_SEL to transcoder
This register appeared in Haswell. It does not have an EDP version because the EDP transcoder is always tied to the DDIA clock. Notice that if we call PIPE_CLK_SEL(pipe) when pipe is PIPE_A and transcoder is TRANSCODER_EDP we might introduce a bug, that's why this is a transcoder register even though it does not have an EDP version. Even though Haswell names this register PIPE_CLK_SEL, it will be renamed to TRANS_CLK_SEL in the future, so let's just start using the real name that makes more sense and avoids misusage. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python')
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