diff options
| author | Eric Anholt <eric@anholt.net> | 2016-02-15 19:03:57 -0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-04-12 09:09:02 -0700 |
| commit | b3822a1078c87a6f74270741bc4cc660e4f11bae (patch) | |
| tree | 2817fc296f2d53daac5692c1dca99ecac12c113f /tools/perf/scripts/python | |
| parent | 5f9403e710e03098b06c321aee6b31621efca5b1 (diff) | |
clk: bcm2835: Fix setting of PLL divider clock rates
commit 773b3966dd3cdaeb68e7f2edfe5656abac1dc411 upstream.
Our dividers weren't being set successfully because CM_PASSWORD wasn't
included in the register write. It looks easier to just compute the
divider to write ourselves than to update clk-divider for the ability
to OR in some arbitrary bits on write.
Fixes about half of the video modes on my HDMI monitor (everything
except 720x400).
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions