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| author | Saranya Chidura <schidura@codeaurora.org> | 2017-05-18 10:20:05 +0530 |
|---|---|---|
| committer | Saranya Chidura <schidura@codeaurora.org> | 2017-05-18 14:34:14 +0530 |
| commit | 8a36de60b60d38d0e16d587a34d4cfffb973f04a (patch) | |
| tree | e1ac2ab25627c3e326343d97118634fbbfcbc3c3 /tools/perf/scripts/python | |
| parent | 5404e35069576a8cd8203065f60975e34a5f727b (diff) | |
coresight: fix the unbalanced qdss_clock count
In an unsuccessful STM driver registration, the qdss_clk
is disabled twice in the error path i.e once in amba_probe
and stm_probe. Removed the redundant disable of qdss_clk
from the stm_probe for correct functionality.
Change-Id: I5d2edef0d72384552203f9c922482f5fd9cddc31
Signed-off-by: Saranya Chidura <schidura@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions