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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-04-24 23:55:03 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-05-19 15:31:05 +0200 |
| commit | 71b1c373ca49a0bbe8d299754def035ff359284b (patch) | |
| tree | 95074886430dd1127ffb2904a5c1a806ea67a083 /tools/perf/scripts/python | |
| parent | efa9624e2a5c42c9eab4fa9e64e5e5f61f3f1866 (diff) | |
drm/i915: Sprinkle intel_edp_psr_update over crtc_enable/disable
My plan here is to split up set_base into a prepare step, which does
the pinning, and a commit stage, which updates the hw state. Eventually
we should be able to move the prepare step at the beginning of any
atomic update. For now I only want to move the commit step into the
crtc_enable callbacks.
As a prep step sprinkle intel_edp_psr_update all over the place so
that we don't have to concern ourselves with that in the commit step.
v2: Rebase on top of Ville's enable/disable functions for all planes.
v3: Rebase more.
Reviewed-by: Akash Goel <akash.goel@intel.com> (v2)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
