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| author | Jordan Crouse <jcrouse@codeaurora.org> | 2017-02-13 10:14:28 -0700 |
|---|---|---|
| committer | Jordan Crouse <jcrouse@codeaurora.org> | 2017-02-22 09:52:25 -0700 |
| commit | 663d4c0a64159fb15cc0817424081695901f39cb (patch) | |
| tree | 39170318a2c170cf5404e4eb710ee58d091767e9 /tools/perf/scripts/python | |
| parent | 40b74543b5e0f7a786a344b1e2112dba7ca1f150 (diff) | |
iommu/arm-smmu: Add support for TTBR1
Allow a domain to opt into allocating and maintaining a TTBR1
pagetable. The size of the TTBR1 region will be the same as
the TTBR0 size with the sign extension bit set on the highest
bit in the region.
By example, given a TTBR0/TTBR1 virtual address range of 36
bits the memory map will look like this:
TTBR0 [0x000000000:0x7FFFFFFFF]
TTBR1 [0x800000000:0xFFFFFFFFF]
The map/unmap operations will automatically use the appropriate
pagetable for the given iova.
Change-Id: Ic0dedbad2b2c58cd9c47ce31356472e0463d4228
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
